IBM's POWER7 processors stand out on a number of counts, not the least of which is their complexity. But beyond the 1.2 billion transistors, up to eight processing cores, SRAM and eDRAM, and clock speeds of 4Ghz, the processor family is unique for a very different reason. It was the pioneer for a new approach to complex chip design within IBM that leverages high-performance computing (HPC) capabilities in the cloud to bring scalability, cost efficiencies, and flexibility to a global development effort.
Other large-scale IBM chip programs have long tapped into grid computing and dispersed HPC capabilities, but it became apparent in the mid-2000s that the company needed an even more efficient infrastructure around large-scale processor design to rein in escalating IT costs around engineering and keep complexity down. With sophisticated simulation software a requisite for chip design, the IT costs associated with maintaining computing power in design centers scattered across the globe had skyrocketed. There was also mounting complexity associated with trying to collaborate and reconcile design data across the distributed computing infrastructure.
"Simulations are becoming more and more complex. Deadlines are becoming shorter and shorter, and you end up with huge spikes in the need for computing power behind all of the design engineering," says Bruce Anderson, general manager, electronics industry, at IBM. "The IT costs for engineering keep escalating, impacting companies' ability to profit on designs."
That was certainly the case for the POWER7 development team, which was looking at a static development budget to bankroll the design of a far more complex chip. With more of its development manpower scattered across different design centers around the world, building and maintaining separate pools of HPC resources was becoming a cost burden. It was also an administrative nightmare around keeping data consistent across the different silos. The scenario showed no signs of abating at IBM or at any other semiconductor manufacturer, for that matter.
"We get roughly the same development dollars every year, so the question became, how do we become more efficient to do more and more complex chip design," says Carl Anderson, the IBM fellow behind the HPC cloud effort.