Generative AI Enters Custom IC Verification

IC design and verification are arguably two of the most compute-intensive design tasks for engineers, and EDA vendors are infusing artificial intelligence (AI) into design software to address increasingly complex circuit design needs.

Siemens Digital Industries Software is the latest company betting on AI with its Solido™ Design Environment software – an AI-powered, cloud-ready integrated circuit (IC) design and verification solution.

According to Siemens, Solido Design Environment software delivers a unified approach for custom IC design and verification that can help designers to achieve high overall design quality and reduce time-to-market, while optimizing for inter-dependent tradeoffs. It provides a single, comprehensive cockpit that handles nominal and variation-aware analysis, including SPICE-level circuit simulation setup, measurements and regressions, as well as waveforms and statistical results analysis.

“Engineering teams must solve complex problems and innovate at a faster pace than before, said  Amit Gupta, vice president and general manager of the Custom IC Verification division at Siemens Digital Industries Software, in a recent interview with Design News. “There are increasing development and fabrication costs, increased variability, and noise parasitics, as well as larger, denser, and more complex designs.”

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According to Gupta, IC verification is a tedious, laborious task, which traditionally involves the use of brute force statistical methods requiring upwards of millions of samples to achieve high sigma verification. On top of this, semiconductor circuit responses do not follow Gaussian distribution.

By using AI, Siemens’ design software  helps designers identify optimization paths to improve circuit power, performance, and area, as well as to perform production-accurate statistical yield analysis at a fraction of runtime compared to brute-force methods.

One key benefit of AI is verifiability. “You want to make sure the answers are verifiable by design engineers so you can tell the AI model is correct,” Gupta said. “Verifiability is important.”

The tool uses several forms of AI. According to Gupta, adaptive AI was able to deliver brute force yield verification, achieving several orders of magnitude faster calculatons.

“In one example, only 4,000 simulations were needed,”  Gupta said.

The tool also used additive AI to speed iteration runtime. With custom IC verification, much of the work is iterative, and rerunning calculations is costly. By reusing knowledge from previous jobs or similar designs by a factor of 10 to 100X. They reduced the number of simulations required by 11,000 to well under 600 in one run, according to Gupta.

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Besides adaptive and additive AI, the tool also uses generative or what Gupta terms as assistive AI algorithms, which helps speed the time generating new designs and performing the all-important optimization. The assistive learning technology reduces iterations and overdesign to achieve a 5 to 10X productivity with better quality of results. The assistive learning identifies optimization paths to improve yield optimization. It helps boostperformance for design and verification teams, producing smarter and faster AI decisions and analysis using on retained AI models.

The Solido Design Environment software is available now.

Spencer Chin is a Senior Editor for Design News covering the electronics beat. He has many years of experience covering developments in components, semiconductors, subsystems, power, and other facets of electronics from both a business/supply-chain and technology perspective. He can be reached at [email protected].