Chip Innovations Meet Leading-Edge Electronics Apps at ISSCC

High-speed networks, EVs, and AI centerpieces of sessions on IC chip design advances at key industry chip conference in San Francisco.

Spencer Chin, Senior Editor

February 15, 2023

4 Min Read
AMD Chairperson and CEO Lisa Su at the CES 2023 keynote session.
AMD Chairperson and CEO Lisa Su, shown here speaking during the keynote session in CES 2023, will headline a prestigious list of industry speakers at ISSCC in San Francisco.Image courtesy of David Becker/Getty Images

Solid state circuits have seen an unprecedented wave of development for more than six decades, and the latest advances in chips of all types will be highlighted at the International Solid State Circuits Conference, to take place at the Marriott Marquis Hotel in San Francisco from Sunday, February 19 through Thursday, February 23.

Sponsored by the IEEE, ISSCC is traditionally the showcase for future chip architectures that will find their way into new microprocessors and other chips from leading vendors such as Intel, AMD, and others. While some announcements are expected, a look at this year’s conference program also reveals plenty of discussion on leading-edge applications for high-speed chips, including autonomous and electric vehicles, accelerators, and high-speed servers for artificial intelligence (AI), and high-speed networks.

On Sunday, February 19, an all-day forum at ISSCC called, “The Power Behind Electrical VehiclesꟷAccelerating the Future of Automotive Technology,” will provide a comprehensive overview of the mega trend and design challenges related to battery protection and management systems, drivetrain topologies & systems, power semiconductor devices and modules, supplemental power electronics, automotive sensors, PMIC, and LED drivers.

Related:Microprocessor Suppliers Ramp Up Performance As Demands Grow

High-speed Electrical and Optical Transceivers

Another all-day Sunday forum at ISSCC titled, “Transceivers for Exascale: Towards Tbps/mm and sub-pJ/bit,” covers electrical and optical transceivers used throughout these systems, from short die-to-die interconnect to long-distance network interfaces. In addition to state-of-the-art standard and proprietary interfaces, the forum also covers emerging and future works that will significantly increase interface bandwidth and power efficiency, and the design challenges of building high-performance connectivity chips.

Compute Efficiency, Mixed-Signal ICs

The official opening day of ISSCC, Monday, includes several interesting plenary sessions from industry executives on major semiconductor and electronics trends. Here’s are two of them:  

--At 8:45 am, AMD Chairperson and Chief Executive Lisa Su will deliver a presentation titled, “Innovation For the Next Decade of Compute Efficiency.” The paper will highlight a holistic strategy to accelerate innovation in energy efficiency required for next-generation, high-performance computing and ultimately achieving zettascale performance. These approaches will be built on continued innovation in process technologies, modular chiplet architectures, and advanced packaging.

-Following Su at 9:20 am is Akira Matsuzawa, Professor Emeritus of Tokyo Institute of Technology and CEO of Tech Idea, Kawasaki, Japan. His paper, titled, “Shape the World with Mixed-Signal Integrated 9:20 AM Circuits - Past, Present, and Future,” discusses the design innovations in mixed-signal ICs that have spearheaded the incorporation of digital technology in audio, TV, camera, and wireless communications equipment. He will also examine future advances and applications.

A video from last year’s ISSCC plenary session presentationThe Future of the High Performance Semiconductor Industry and Design follows below:

 

Looking at IC Connectivity

Following the day’s technical sessions, on Monday evening at 8 pm there is a panel session titled, “Integrated Circuits in an Interconnected World.” This panel focuses on connectivity for the next generation of communication systems and brings together expert panelists to share their perspectives on topics in IC connectivity across wireless, wireline, chip-to-chip, and optical link communications.

Sustainability Emerging in the IC Ecosystem

At the same time Monday evening, the hot-button issue of sustainability will be discussed in an ISSCC panel session titled, “The Path to Sustainable IC Ecosystems.” The session will examine current initiatives for sustainable electronics, coming from research labs, companies, citizens, or governments. This panel will explore the potential of proposed sustainability initiatives to create a viable, sustainable economic path via market incentive or government regulation.

AI to Have Profound Effects on Chip Design

A Tuesday, February 21 ISSCC evening session titled, “What will be the Essential Skills for IC Designers in the Next Decade?” looks at the changes in IC design and verification due to the emergence of artificial intelligence. This session of academic and industry leaders will predict and discuss how future design automation will change the way IC designers work in the next decade. It will examine whether will more IC design be automated and whether the field is shrinking.

AI Meets Heterogeneous IC Architectures and Chiplets

AI is also the centerpiece of an ISSCC forum on Thursday, February 23, titled, “The Future of Heterogeneous Multi-Core Architectures for AI and Other Specialized Processing.” This session will examine how processor SoC design is increasingly moving to heterogeneous architectures, in which different processor types are combined in the same processing system. The session will discuss the challenges of heterogeneous processing cores efficiently sharing data as the number of cores keeps going up. The session will also look at the benefits of heterogeneous multi-core architectures as chiplet architectures become more common.

The ISSCC website has complete information on the International Solid State Circuits Conference, including registration and details of all sessions and courses.

Spencer Chin is a Senior Editor for Design News covering the electronics beat. He has many years of experience covering developments in components, semiconductors, subsystems, power, and other facets of electronics from both a business/supply-chain and technology perspective. He can be reached at [email protected].

About the Author(s)

Spencer Chin

Senior Editor, Design News

Spencer Chin is a Senior Editor for Design News, covering the electronics beat, which includes semiconductors, components, power, embedded systems, artificial intelligence, augmented and virtual reality, and other related subjects. He is always open to ideas for coverage. Spencer has spent many years covering electronics for brands including Electronic Products, Electronic Buyers News, EE Times, Power Electronics, and electronics360. You can reach him at [email protected] or follow him at @spencerchin.

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