Latest FPGAs offer high I/O density and interfacing flexibility for edge-connected sensors, cameras.

Spencer Chin, Senior Editor

March 26, 2024

3 Min Read
AMD FPGAs target edge apps for sensors, cameras, other connected devices.
AMD’s Spartan UltraScale+ FPGAs combine high I/O density, interfacing flexibility, low power consumption, and security for edge applications. AMD

At a Glance

  • AMD is targeting edge applications with its newest FPGAs
  • High I/O density and interfacing flexibility allow the parts to be used in many applications.
  • The FPGAs also consume low power and incorporate robust security features.

When AMD acquired FPGA (Field Programmable Gate Array) supplier Xilinx several years ago, the semiconductor giant gained one of the market leaders in the growing FPGA market, which has held its own even during the semiconductor downturn after the COVID-19 pandemic. Earlier this month,  AMD announced its  AMD Spartan™ UltraScale+™ FPGA family to strengthen its already extensive portfolio of Cost-Optimized FPGAs and adaptive SoCs.

The FPGA market continues to be abuzz with activity as AMD’’s competitors, Intel, Lattice Semiconductor, and Microchip, have all made announcements in recent months about the availability of new or improved FPGAs. Now, AMD hopes to leapfrog its competitors with its latest FPGAs.  

Rob Bauer, Senior Manager of Cost-Optimized FPGAs, said during a recent conference call that the Spartan parts will find applications in the growing number of edge applications for connected devices such as cameras and sensors, in applications ranging from industrial to medical to aerospace.

According to AMD, Spartan UltraScale+ devices reportedly offer the industry’s highest I/O to logic cell ratio in FPGAs built in 28nm and lower process technology. The new FPGAs also reportedly consume up to 30% less power than the company’s previous-generation 28nm Artix™ 7 family, through 16nm FinFET technology and hardened connectivity. The FPGAs also contain robust security features.

Related:FPGA Players Up the Ante For Edge Computing, AI

Flexible I/O Interfacing

The family offers the industry’s highest I/O to logic cell ratio of FPGAs built on 28nm and below process technology, with up to 572 I/Os and voltage support up to 3.3V, enabling any-to-any connectivity for edge sensing and control applications. The proven 16nm fabric and support for a wide array of packaging, starting as small as 10x10mm, provide high I/O density in an ultra-compact footprint. The extensive AMD FPGA portfolio also provides the scalability to start with cost-optimized FPGAs and continue through to midrange and high-end products.

The FPGAs incorporate a hardened LPDDR5 memory controller and PCIe® Gen4 x8 support, providing both power efficiency and future-ready capabilities for customers.

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Numerous Security Features

Spartan UltraScale+ FPGAs also incorporate new security features including:

  • Protecting IP: Support for Post-Quantum Cryptography with NIST-approved algorithms offers state-of-the-art IP protection against evolving cyber-attacks and threats. A physical unclonable function provides each device with a unique fingerprint for added security.

  • Preventing tampering: PPK/SPK key support helps manage obsolete or compromised security keys while differential power analysis helps protect against side-channel attacks. The devices contain a permanent tamper penalty to further protect against misuse.

  • Maximizing uptime: Enhanced single-event upset performance helps fast and secure configuration with increased reliability for customers.

Related:Lattice Sees No End to FPGA Growth

AMD’s portfolio of FPGAs and adaptive SoCs are supported by the AMD Vivado™ Design Suite and Vitis™ Unified Software Platform, enabling hardware and software designers to leverage these tools and associated IP via a single designer cockpit from design to verification.

Spartan UltraScale+ FPGA family sampling and evaluation kits are expected to be available in the first half of 2025. Documentation is now available with tools support due in the fourth quarter.   

About the Author(s)

Spencer Chin

Senior Editor, Design News

Spencer Chin is a Senior Editor for Design News, covering the electronics beat, which includes semiconductors, components, power, embedded systems, artificial intelligence, augmented and virtual reality, and other related subjects. He is always open to ideas for coverage. Spencer has spent many years covering electronics for brands including Electronic Products, Electronic Buyers News, EE Times, Power Electronics, and electronics360. You can reach him at [email protected] or follow him at @spencerchin.

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