Can RISC Answer the Call for High-Speed Computing?

SiFive betting that its latest RISC cores can meet the throughput needs of AI.

Spencer Chin, Senior Editor

October 13, 2023

2 Min Read
SiFive's new RISC-V cores are designed to expedite development of AI and machine learning systems.SiFive

RISC (Reduced Instruction Set Computing) has often been thought of as a solution for embedded applications, but SiFive, which has been supplying cores based on its RISC-V IP, is adamant that its latest processor cores can provide the performance needed for AI and other data-intensive applications.

The company has developed several new cores the company says will provide the combination of scalar and vector computing to meet AI and other data-intensive applications.

“We want to be a broad-based supplier of RISC-V,” said Chris Jones, Vice President of Products for SiFive in a recent online press briefing. “The recent ARM IPO validates the growth in RISC, and we believe we can compete with ARM.”  ARM is considered the most significant company offering RISC-based processors.

Jones stated that the RISC architecture has been finding design wins in several markets, including consumer, aerospace, and automotive. For instance, he noted that NASA has been looking at RISC-V processors for mission-critical apps requiring power efficiency. The video below discusses RISC-V.

Two New Parts

SiFive’s new RISC-V IP cores are the SiFive Performance™ P870 and SiFive Intelligence™ X390. The P870 core is considered ideal for high performance consumer applications, or used in conjunction with a vector processor in the datacenter. The P870 core sets provides a 50% peak single thread performance upgrade over the previous generation SiFive Performance processors. It utilizes a six-wide out-of-order core that meets RVA 23 and offers a shared cluster cache enabling up to a 32-core cluster. High execution throughput comes with more instruction sets per cycle, more ALU, and more branch units. The P870 is fully compatible with Google’s platform requirements for Android on RISC-V.

The P870 features a 128b VLEN RVV, · vector crypto and hypervisor extensions, IOMMU and AIA, and a non-inclusive L3 cache. ·

SiFive’s X390 core is based on the popular X280, which has found applications  in coupling AI/ML with hardware accelerators in mobile, infrastructure, and automotive applications. According to the company, the X390 core brings a 4x improvement to vector computation with its single core configuration, doubled vector length, and dual vector ALUs. This in turn produces a 4X improvement in  sustained data bandwidth.

With SiFive Vector Coprocessor Interface eXtension (VCIX) companies can easily add their own vector instructions and/or acceleration hardware, bringing flexibility and allowing users to greatly increase performance with custom instructions. Other features include of the X390 core include a 1024-bit VLEN, 512-bit DLEN, a single /dual vector ALU · VCIX (2048-bit out, 1024-bit in).

Spencer Chin is a Senior Editor for Design News covering the electronics beat. He has many years of experience covering developments in components, semiconductors, subsystems, power, and other facets of electronics from both a business/supply-chain and technology perspective. He can be reached at [email protected].


About the Author(s)

Spencer Chin

Senior Editor, Design News

Spencer Chin is a Senior Editor for Design News, covering the electronics beat, which includes semiconductors, components, power, embedded systems, artificial intelligence, augmented and virtual reality, and other related subjects. He is always open to ideas for coverage. Spencer has spent many years covering electronics for brands including Electronic Products, Electronic Buyers News, EE Times, Power Electronics, and electronics360. You can reach him at [email protected] or follow him at @spencerchin.

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