Missed the First Major Tech Show to Reopen? Check Out These DesignCon Highlights

Demonstrations, conversations, and exhibits provided plenty of insights at the physical reopening of this year’s DesignCon event.

John Blyler

August 30, 2021

4 Min Read
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John Blyler, Design News

This year marked the in-person physical return of DesignCon, the long-running show for chip, board, and systems design engineers in the high-speed communications and semiconductor communities. This three-day technical conference and two-day expo combined technical paper sessions, tutorials, industry panels, product demos, exhibits from the industry's leading experts and solutions providers. Here are just a few of the things heard and seen during this year’s event.

Keynotes

  • 4G was about a faster data pipe. 5G will reach expand fast speeds to broader markets and verticals. The upcoming 6G technology will provide a platform upgrade to handle both computing and data. – Mike Fitton, VP, Data Platforms Group & GM, Network Business Division, Intel

  • The future of healthcare will include cultivating longitudinal (across time) patient data sets and advanced analytics and artificial intelligence personalization engineering. And the hospital of the future will be everywhere, not just in the hospital or doctor’s office. – Mark Wehde, Chair, Mayo Clinic

  • A car to see as a human does need a sensor suite that equips the vehicle to detect objects and understand its environment on any roadway, in any light and weather condition, and at any speed. -- Indu Vijayan, Director of Product Management at AEye

Related:Want to See a Live Demo of Adaptive LiDAR? Come to the Show!

Chiplet for SerDes

Kandou showcased a USB-C Multiprotocol Retimer for USB4 and High-Speed, Ultra-Low Power Chord Signaling Technologies. The company is a provider of high-speed, energy-efficient chip-to-chip link solutions.

The CNRZ-5 and ENRZ product demonstrations used Keysight Technologies’ DCA-X Sampling Oscilloscope and 4x60GHz N1045B Sampling Modules to capture waveforms generated from Kandou silicon and display the linear combinations according to the Chord signaling schemes of each.

The CNRZ-5 signaling scheme was optimized for high-speed, ultra-low power USR SerDes-based chiplet interconnect in standard organic MCM packaging and power consumption of 1pJ/bit.IMG_7485.jpg

Kandou and Keysight demonstrate high-speed SerDes.

Super Sensor Cars

During her keynote, Vijayan mentioned how AEye refers to the most challenging cases, the 5% that are the most difficult to solve in autonomy, as “edge” or “corner” cases. These can be weather-related, auto-related, object-related, etc. These are the types of scenarios that a sensor system must solve to be smarter than a human. This will require a system-level approach that is better than the sum of its parts and surpass the performance of both the human eye and camera alone.

VSI Labs, one of the nation’s leading active safety and automated vehicle technology experts, has reported on its verification of the performance testing of AEye’s iDAR system with emphasis on applications for safety and autonomy. AEye also announced it is making its interactive Raptor demo system available to qualified parties to experience the performance of its 4Sight M sensor.

Related:Healthcare on the Edge? That May be a Good Thing

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An editor looks at Lidar system on VSI Labs/AEye demon.

Pose Estimation with Deep Learning

3D pose estimation is used to predict the transformation of an object from a user-defined reference pose, given an image or a 3D scan. It is part of the field of video analytics which includes image classification, detection, and various other AI-powered applications.

The global AI market is forecasted by research firm IDC to approach $98.4 billion in revenue in 2023.

Socionext Inc., a global fabless ASIC supplier, showcased its advanced SoC designs at the show. Demos included 112G SerDes, 30-120GS/s ADC/DAC, PCIe Gen5, high-performance memory, and multi-die package design solutions. Among the demos was a PoseEstimator using their high-efficiency AI hardware accelerator that incorporates quantized Deep Neural Network (DNN) algorithms capable of supporting various inferencing models for classification, detection, semantic segmentation, pose & depth estimation, and others.

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An editor poses for a

John Blyler is a Design News senior editor, covering the electronics and advanced manufacturing spaces. With a BS in Engineering Physics and an MS in Electrical Engineering, he has years of hardware-software-network systems experience as an editor and engineer within the advanced manufacturing, IoT and semiconductor industries. John has co-authored books related to system engineering and electronics for IEEE, Wiley, and Elsevier.

About the Author

John Blyler

John Blyler is a former Design News senior editor, covering the electronics and advanced manufacturing spaces. With a BS in Engineering Physics and an MS in Electrical Engineering, he has years of hardware-software-network systems experience as an engineer and editor within the advanced manufacturing, IoT and semiconductor industries. John has co-authored books related to RF design, system engineering and electronics for IEEE, Wiley, and Elsevier. John currently serves as a standard’s editor for Accellera-IEEE. He has been an affiliate professor at Portland State Univ and a lecturer at UC-Irvine.

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