The Slow Death of Hardware Design

Warren Miller

March 3, 2015

4 Min Read
The Slow Death of Hardware Design

Maybe some of you remember hardware design? You know, designing with flip-flops, logic gates, multiplexers and decoders. Wiring together J/K flip-flops, counters, and a few 7400 logic gates to make a state machine? Well, even if you don't, hardware design has always been, to me anyway, designing at the very lowest abstraction level. It was needed primarily because there were no fixed function devices that did just what you wanted, or you had to 'glue together' the two, inexplicably incompatible, functions you needed to work together.

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Even when FPGAs matured and the design tools allowed you to work at a (slightly) higher level with hardware description languages, you needed to do hardware design to glue together incompatible on-chip processors and peripherals. External interfaces didn't seem to quite match with your other devices on the board, so much of the FPGA was used up making the interfaces fit. Even if the interfaces were compatible, often the bandwidth differences made FIFOs and memory buffers requirements to get the sub-systems to work at the performance level required for the application.

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Todays FPGA design tools have left all the low level 'hardware design' behind. Manufacturers are using standard ARM-style processors and peripheral interfaces so you seldom need to 'glue' together incompatible interfaces. In fact, most new FPGA design tools do much of the interface interconnect for you.

For example, the Microsemi SmartDesign and System Builder tools in its Libero tool suite allow you to select pre-defined intellectual property (IP) blocks (either dedicated silicon 'hard' functions or 'soft' functions using configurable logic) from an extensive library. You just place these functions as graphical elements on your design 'canvas'. The software then assists you with interconnecting the various busses, clocks, and control signals, in an intelligent and guided fashion. It prods you every step of the way, with selection boxes and pull down menus that eliminate the possibility of any misconnections. No hardware design needed!

Now FPGA manufacturers have taken things one step further. As you select and configure your processor, peripherals, and supporting IP blocks, the software automatically pulls in the various drivers you might need to write code for your design. In many cases reference designs with applicable example code and higher-level application programming interfaces are also available. Often you can further define these code blocks by using configuration wizards.

  • Want the timer block to run for exactly 4,567 clock ticks prior to rolling over? Just select that setting in the wizard.

  • Want the rollover to trigger an interrupt to begin a DMA transfer? Just select that setting.

You get the idea. No more low-level hardware design tasks -- just selecting and configuring intelligent modules.

Once the hardware is all defined everything is ready for the software engineer to begin programming. In fact, these tools are becoming so easy to use that the software design can do all the selection and configuring themselves. No need for a 'hardware' designer to do this for them. In fact, that seems to be the goal of the FPGA companies. Get FPGAs into the hands of the millions of software designers out there and bypass the hardware gatekeepers who have been clogging the arteries of the development process. It's not like they haven't done this before.

Remember when gate arrays were the bastion of hardware designers and they controlled that critical aspect of hardware design? Look what FPGAs did to the castle walls then.

So, get out your "C" programming texts, take a few online classes, and learn the new skills you will need to move from hardware design to software design. It won't be too much longer, and hardware design, as we used to know it, will be remembered alongside the slide rule and the Karnaugh map. You will need to move beyond those familiar bits and bytes into the new world of software centric design.

Warren Miller has more than 30 years of experience in electronics and has held a variety of positions in engineering, applications, strategic marketing, and product planning with large electronics companies like Advanced Micro Devices, Actel, and Avnet, as well as with a variety of smaller startups. He has in-depth experience of programmable devices (PLDs, FPGAs, MCUs, and ASICs) in industrial, networking, and consumer applications and holds several device patents.

About the Author

Warren Miller

Warren Miller has more than 30 years of experience in electronics and has held a variety of positions in engineering, applications, strategic marketing, and product planning with large electronics companies like Advanced Micro Devices, Actel, and Avnet, as well as with a variety of smaller startups. He has in-depth experience of programmable devices (PLDs, FPGAs, MCUs, and ASICs) in industrial, networking, and consumer applications and holds several device patents. He is currently the principal at Wavefront Marketing, working as a consultant specializing in strategic planning, technical marketing, and competitive analysis for semiconductor, intellectual property, and associated design tool companies. Warren has authored more than 100 conference papers, whitepapers, application notes, and magazine articles on a wide variety of topics and is a frequent blogger on the All Programmable Planet and Microcontroller Central websites and is the founder of the Chess FPGA project.
Email: [email protected]

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