Software-Designed PACs: Think Subroutine, Not Sub-Controllers

Today's controls engineers face pressure to simplify system complexity as they are tasked with increasingly complex problems. Unfortunately, solutions to these challenges are difficult to define; so overall market trends are discussed in an attempt to distill escalating complexity. Motors, once viewed as large pieces of iron that would last for decades, are now monitored and scrutinized for the earliest signs of failure or the slightest hint of efficiency loss. Control inputs to cutting tools have evolved from the binary "cut or stop cutting" approach to complex vision-guided force-feedback schemes that detect media edges, density, and respond with the precise amount of cutting force. These examples support the real need to integrate commercial technology to keep pace with both market pressures and increasingly complex control problems.

Fortunately, commercial technology continues to advance for control designers. Some of the latest silicon technologies combine floating-point processing cores, FPGA fabric, and DSP slices on a single chip. When integrated into programmable automation controller (PAC) technology, these processing elements help control designers to collapse advanced machine subsystems into a more simple architecture.

This may sound a bit foreign to control designers more familiar with ladder logic than logic gates, but all PACs, PLCs, and embedded controllers contain processing elements. Many contain FPGAs or ASICs used for signal processing and timing. These different processing elements are analogous to different types of hammers. The tool aisle at the local hardware store has a wealth of hammer options, and whether building a house or a control system, it's critical to use the right tool for the job. PC-based automation is like the general-purpose claw hammer -- versatile enough for most applications, but too harsh to properly function as a dead blow mallet, too light to act as a sledge, and too small to serve as a good framing hammer. For a broad range of applications the standard floating-point processor is ideal though it falls short when high-speed timing, triggering, or low latency is needed. Floating-point processors can also be used for signal and control processing; however, these are costly resources compared to an FPGA or DSP for repetitious algorithms. FPGAs, on the other hand, are ideal for processing intensive algorithms but are limited in runtime flexibility. It's the combination of all of these processing elements that make new PACs so promising when it comes to simplifying subsystems.

At a basic level, subsystems join hardware and software to serve a specific function such as a temperature control system where the hardware inputs are temperature sensors, the outputs control a fan or heater, and the software logic for the system could range from a simple limit function to a more advanced PID algorithm. In complex machines, advanced subsystems are a separate design on a custom board that communicates back to the main controller via a cabled bus. With new PAC technology, the separate, optimized hardware design can be incorporated into a single controller. This helps simplify machines with fewer controllers, which makes it possible to achieve a faster time to market at a lower design cost. Subsystems in machines are abstracted as software blocks that can run on the host floating-point processor or the available FPGA/DSP resources. Instead of sub-controllers, think subroutine. Regarding the hardware, many sub-controllers already use modular I/O and the advanced capabilities of new embedded controllers help reduce the need for custom FPGA/ASIC hardware design.