SoC FPGA Devices using the Microsemi SmartFusion2 Device

To start we will look at specifying the algorithm to be used in the FPGA and the tools used to verify it.  An overview of the whole tool chain and some examples of the initial steps will be presented.

In this final lecture the layout phase of the FPGA process will be developed.  This will get us to the point where we can bring it all together.  The steps required and the loading process will be covered.