Intel shared details from its emerging portfolio, including Meteor Lake, Ponte Vecchio GPU, Intel® Xeon® D-2700 and 1700, and FPGAs.
Intel’s Meteor Lake, Arrow Lake and Lunar Lake processors contain discrete CPU, GPU, SoC and I/O tiles stacked in 3D configurations using Intel’s Foveros interconnect technology. This platform transformation is reinforced by industry support for the open Universal Chiplet Interconnect Express (UCIe™) specification, enabling chiplets designed and manufactured on different process technologies by different vendors to work together when integrated with advanced packaging technologies.
The company also showed details of its Xeon D-2700 and 1700 series chips, which are designed to address edge use cases for 5G, IoT, enterprise and cloud applications. These chips are also examples of tile-based design, including state-of-the-art compute cores, 100G Ethernet with flexible packet processor, inline crypto acceleration, time coordinated computing (TCC), time-sensitive networking (TSN) and built-in optimization for AI processes.
Intel Data Center GPU, code-named Ponte Vecchio, addresses the compute density across high-performance computing (HPC) and AI supercomputing workloads. It also takes full advantage of Intel’s open software model, using OneAPI to simplify API abstractions and cross-architecture programming. Ponte Vecchio comprises several complex designs that manifest in tiles, connected using a combination of embedded multi-die interconnect bridge (EMIB) and Foveros advanced packaging technologies. The high-speed MDFI interconnect allows the package to scale up to two stacks, allowing a single package to contain more than 100 billion transistors.