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Efficient Fabrication Method Achieved for Nano-Sized Processors

Efficient Fabrication Method Achieved for Nano-Sized Processors
A new rapid fabrication method for nano-scale semiconductors could help advance the design of next-generation processors.

More complex electronic and computing devices call for smaller and faster semiconductors, which means scientists around the world are working with new materials on the nanoscale to achieve the design goals for next-generation technology.

To this end, an international team of researchers led by New York University Tandon School of Engineering Professor of Chemical and Biomolecular Engineering Elisa Riedo has made a breakthrough in fabricating atom-thin processors using a new method for fabricating metals that scientists believe can replace silicon for next-generation chips. The work was described in an NYU news release.

Researchers in the PicoForce Lab modified hot-probe equipment called NanoFrazor by SwissLitho to invent a new process of fabricating 2D semiconductors. Here, the equipment patterns a one-atom-deep layer of molybdenum disulfide with electrodes. (Image source: New York University Tandon School of Engineering)

Atomically Small Chips

The team—comprised of researchers in New York, Switzerland, and Japan, among others—has demonstrated that lithography using a probe heated above 100 degrees Celsius outperformed standard methods for fabricating metal electrodes on 2D semiconductors, such as molybdenum disulfide (MoS₂). This is one of the various transitional metals that are among the materials scientists believe may supplant silicon for atomically small chips.

The team’s new fabrication method—called thermal scanning probe lithography, or t-SPL—offers a number of advantages over today’s electron beam lithography, EBL, which is used in metals manufacturing and semiconductor fabrication, Riedo said.

Improved Quality

Thermal lithography significantly improves the quality of the 2D transistors, offsetting what’s called the Schottky barrier, which hampers the flow of electrons at the intersection of metal and the 2D substrate in semiconductor designs, researchers said. Another advantage of t-SPL is that, unlike EBL, the thermal lithography allows chip designers to easily image the 2D semiconductor and then pattern the electrodes where desired.

T-SPL fabrication systems also promise significant initial savings as well as operational costs, researchers said. This is because they dramatically reduce power consumption by operating in ambient conditions, which eliminates the need to produce high-energy electrons and to generate an ultra-high vacuum. Finally, researchers can easily scale up the new thermal fabrication method for industrial production by using parallel thermal probes, Riedo said. Scientists outlined the research results in a paper in the journal Nature Electronics.

Rapid Advancement

The recent work is the result of more than 10 years of study and experimentation that Riedo has undertaken in thermal lithography, first with IBM Research-Zurich and later SwissLitho, a company founded by former IBM researchers. In fact, it’s a process based on a SwissLitho system that the team developed and used for the current research.

Riedo said that she hopes the new method the team developed will take most fabrication out of clean rooms and into individual laboratories, where materials science and chip design can advance at a more rapid pace. Indeed, clean rooms are generally scarce and require expensive equipment and specific conditions, and researchers are limited in the time they can spend there to work on new technologies.

With any luck, methods like the one Riedo’s team designed can become on par with the same evolution 3D printers have allowed in materials fabrication for various industries, she added. In a similar way, t-SPL tools with sub-10 nanometer resolution—running on standard 120-volt power in ambient conditions—also could become ubiquitous in research labs, allowing for more rapid advancement of technologies.

Elizabeth Montalbano is a freelance writer who has written about technology and culture for 20 years. She has lived and worked as a professional journalist in Phoenix, San Francisco and New York City. In her free time she enjoys surfing, traveling, music, yoga and cooking. She currently resides in a village on the southwest coast of Portugal.

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