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January 30 – Day 3 – Enabling the EEPROM Serial Peripheral Interface

Webinar Information
Start Date: Jan 30, 2019 - 07:00 PM UTC

Our IoT design contains a pair of EEPROMs in its nonvolatile memory subsystem. One of the EEPROMs is a specialized IC that contains a factory-programmed, globally unique 48-bit node address. The other EEPROM is a standard 256Kbit device.  Both EEPROMs require an SPI communications portal. Today’s tasks include coding a suitable SPI communications path, reading and writing the 256Kbit EEPROM, and retrieving the globally unique 48-bit node address from the specialty EEPROM.