The traditional testing of chips and devices must evolve to include customer needs.

John Blyler

June 2, 2021

2 Min Read
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Today's testing technologies primarily serve the 20th-century manufacturing needs of silicon CMOS chips, noted Stanford University Professor Subhasish Mitra in his ETC 2021 keynote presentation. However, in this new decade, testing is going to change radically, driven by several factors:

(a) Testing must grow beyond manufacturing defects to address robustness that end-users care about: design bugs, reliability, and security.

(b) Today's test methods cannot meet the increasing levels of thoroughness demanded by future systems --- from (self-driving) cars to the cloud.

Testing for thoroughness will take place in addition to testing for performance. In the past, clever designers have figured out several tricks to improve performance, such as multi-core processors and adding accelerators to a circuit. These improvements have added massive design complexity, which has resulted in an increase in design bugs and more challenging test techniques. It has become increasingly difficult to verify that these performance design tricks are as bug-free as less complex designs.

(c) Beyond-silicon NanoSystems create new testing challenges.

Nanosystems refer to not only nano-sized devices but also ways of fabricating such devices and sensors. The range of nanosystems goes from one-nanometer devices to many nanosystem devices on a single semiconductor chip.

Related:What is the Difference Between Test and Verification?

These factors create golden opportunities for new "System-Driven" test approaches that address the above seemingly diverse problems at various scales. Testing will then become an essential 21st-century system feature rather than a cost burden defined by the constraints of 20th-century chip manufacturing.

While Mitra's talk is only available to ETC registered attendees, he did present a publicly available discussion on nanosystems at  CASS Talks 2021 (see YouTube below).

John Blyler is a Design News senior editor, covering the electronics and advanced manufacturing spaces. With a BS in Engineering Physics and an MS in Electrical Engineering, he has years of hardware-software-network systems experience as an editor and engineer within the advanced manufacturing, IoT and semiconductor industries. John has co-authored books related to system engineering and electronics for IEEE, Wiley, and Elsevier.

About the Author(s)

John Blyler

John Blyler is a former Design News senior editor, covering the electronics and advanced manufacturing spaces. With a BS in Engineering Physics and an MS in Electrical Engineering, he has years of hardware-software-network systems experience as an engineer and editor within the advanced manufacturing, IoT and semiconductor industries. John has co-authored books related to RF design, system engineering and electronics for IEEE, Wiley, and Elsevier. John currently serves as a standard’s editor for Accellera-IEEE. He has been an affiliate professor at Portland State Univ and a lecturer at UC-Irvine.

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