Like many technology industry segments, the electronic design automation (EDA) chip tool space is not immune to buzzy technology trends that attract the attention of the “Big Three” tool vendors – Synopsys, Siemens EDA (formerly Mentor Graphics), and Cadence. The effect of these trends is to set off a horse race that pits each company’s particular approach against the others. Today, that EDA space trend is Silicon Lifecycle Management.
In an earlier story, Design News covered Synopsy's expansion into the chip product lifecycle space. Now it’s time for another perspective.
Many industry insiders point to Siemens EDA (the new name for pioneering EDA company Mentor Graphics) and its June 2020 acquisition of the UK-based silicon lifecycle leader UltraSoc as the next significant play for the current silicon lifecycle trend.
The company’s decision to invest in Silicon Lifecycle technology does not simply follow the buzzy trend but plays well into its existing Product Lifecycle Management (PLM) suite of software.
To learn more about this life-cycle approach to chip design, Design News reached out to Aileen Ryan, senior director of Strategy for Siemens EDA’s Tessent product group. Ryan was Chief Strategy Officer, Chief Operating Officer for Ultrasoc before its acquisition by Siemens.
Design News: Concerning silicon lifecycle platforms: These types of platforms are commonplace in the world of systems (or systems-of-systems) engineering. What makes the Mentor/Siemen entry unique?
Aileen Ryan: One of our big advantages is implicit in your question: Siemens has a long history of implementing product lifecycle management solutions in other industries. In terms of the semiconductor sector, we have quite a number of differentiators. First, we have a leading position in design for test (DFT), which is a key technology for lifecycle management. Second, through the acquisition of UltraSoC, we have functional monitoring and analytics capabilities. Of course, our EDA products also include tools that span the entire range of semiconductor design and manufacturing – and we collaborate closely with foundries, IC design houses, systems companies, research and development labs, and industry standards organizations.
Design News: How have engineers dealt with the lifecycle management of the chip development process in the past?
Aileen Ryan: As a general statement, lifecycle management principles have been sparsely deployed in the semiconductor industry, but there is an evolution taking place. For example, our DFT and Embedded Analytics products require the up-front insertion of hardware augmentations into the chip design. The benefits come downstream in the process, in the shape of faster, better quality manufacturing test; better yield management; easier bring-up and faster functional debug; and self-test capabilities that enhance safety and reliability. So there is an increasing recognition that joining the dots across the development process can have great benefits.
Design News: Today, the global semiconductor supply chain faces many challenges. Does this tool take design-supply constraints into account?
Aileen Ryan: I think generally the semiconductor industry is actually quite used to functioning on a global basis. Chips are commonly developed by geographically dispersed teams; they are manufactured by third parties, almost invariably remote from the design site; and they are integrated into systems by (often multiple) product design teams, in collaboration between the industry and its customers.
Generally, we think it’s very important to recognize that the move to lifecycle management is a cross-industry effort. It’s not just a matter of choosing a supplier and buying some tools. That’s why we believe that open software interfaces, partnerships, federation capabilities, and appropriate standards are all important elements in building an appropriate ecosystem.
Design News: Why is it necessary to ensure access to process and device data throughout the entire chip life span?
Aileen Ryan: That’s quite a complex question, but we can look at three main areas. First is the continuing evolution of the manufacturing process – the drive to put ever smaller features on every chip. As those features get smaller, the industry faces new challenges to ensure not only the best possible production yield but also the lowest possible lifetime cost: we need to make sure devices are performant and reliable throughout their lives. As an example, think of the heavy cost to a vehicle manufacturer of having to undertake a recall process. The rate and mechanisms of both early failure and device wear-out change as process technology evolves – understanding that second process is an example of where collecting data from the whole lifespan, including after deployment, becomes important.
The second important factor is the rapid increase in device complexity. Chips today are systems in their own right. This makes it harder to understand their real-world behavior against design intent: and it makes them more difficult to test (increasing time and cost in the production process). These factors in turn make it necessary to gather data post-deployment to make the whole value chain more efficient.
Last but not least, overall system complexity and the ubiquity of electronics are increasing. That makes it harder to predict in advance every single condition and use case the chip will encounter. And it means that chips are increasingly found in situations where uptime, security, and safety are issues. It’s obviously critically important that the electronics controlling – say – an autonomous vehicle operates safely and is resilient under unexpected conditions (including, incidentally, malicious attacks). Less obvious is the need to ensure appropriate levels of resilience in sectors like data center operations, where failure may not translate into lives lost, but certainly translates into dollars.
Another dimension to system-level complexity is the increasing importance of software, and the need to understand how software and hardware interact – not least in environments where in-field or over-the-air updates are commonplace, again requiring testing and gathering of data in the field.
|Silicon lifecycle solutions encompass the complete cycle of design, realization, and utilization, addressing debug, test, yield management, safety and security, and in-field optimization.|
John Blyler is a Design News senior editor, covering the electronics and advanced manufacturing spaces. With a BS in Engineering Physics and an MS in Electrical Engineering, he has years of hardware-software-network systems experience as an editor and engineer within the advanced manufacturing, IoT and semiconductor industries. John has co-authored books related to system engineering and electronics for IEEE, Wiley, and Elsevier.