DesignCon 2025 Welcomes the Next Generation of EngineersDesignCon 2025 Welcomes the Next Generation of Engineers

These engineers have been accepted into DesignCon’s "40 Under 40" program. Come meet them at the show!

Daphne Allen, Editor-in-Chief

January 22, 2025

3 Min Read

DesignCon is helping engineer a bright future. The annual event for chip, board, and systems design engineers is enriching the education of 40 up-and-coming engineers in its 2025 40 Under 40 program. Selected through an open nomination and review process, these recipients will have full access to all DesignCon educational sessions, including its 15-track conference, as well as the expo floor and all networking sessions. These engineers will also be honored during an exclusive networking breakfast along with their highly regarded industry mentors and DesignCon speakers. 

"With this sophomore edition of the DesignCon 40 Under 40 program, we are honored to celebrate this exceptional group of engineers, who will surely become next-generation leaders in the chip, board, and systems communities," says Suzanne Deffree, group event director for DesignCon. "Inspiration for not just today’s innovations but tomorrow’s has always been at the core of DesignCon. Being a part of these engineers’ education and career advancement through the 40 Under 40 program, that will continue to build the electronics industries, is fitting as DesignCon celebrates its 30th anniversary this January."

Program mentors include:

  • Maria Agoston, Principal Engineer, Tektronix

  • Eric Bogatin, Professor, University of Colorado, Boulder

  • Cathy Liu, Distinguished Engineer, Broadcom

  • Steve Sandler, President, Picotest

Related:Upgrade Your Engineering Know-How at DesignCon


This year's 40 Under 40 group includes DesignCon first-timers as well as speakers at past shows and features engineers from around the world. The 40 Under 40 are:

  • Abhav Sahdev, Masters Student in High-Speed Digital Eng., University of Colorado Boulder

  • Abishek Manian, Analog Design Manager & Senior Member of Technical Staff, Texas Instruments

  • Anuj Sharma, Founder & CEO, Chip Web Technologies

  • Arno van Hoek, Experienced Hardware Engineer, Axis Communications AB

  • Asaad Kaadan, Founder, CEO & CTO, Hexabitz

  • Ashika Shaji Pandankeril, Staff R&D/Product DVL Engineer System Architecture, TE Connectivity

  • Byungjin Bae, Staff Engineer, Samsung Electronics

  • Cameron Refaee, Analog Design Engineer II, AMD

  • Chaofeng Li, Senior Engineer, Qualcomm

  • Clay Clemmer, Student, Solano Community College

  • Damon Choi, Field Application Engineer, Molex

  • Daniel Young, Vice President, Tecdia

  • Dhruv Chawla, Field Application Engineer, Molex

  • Eduardo Mendes, Digital Design Engineer, Kandou

  • Elizabeth Adams, UX Designer, Software Product Design, Tektronix

  • Emerald Smith, Founder & CEO, Emerald Consulting Group

  • Gajaba Wickramarathne, Field Sales Engineer, RF Associates - North

  • Garrett James Baldwin, Layout & Signal Integrity Engineer, Microchip Technology

  • Idan Ben Ezra, Hardware & Power Integrity Engineer, Broadcom

  • Imam Uddin, IC Systems Engineer, Broadcom

  • Jason Ruth, Field Application Engineer, Molex

  • Jeremy Cosson-Martin, Member of Technical Staff (MTS), AMD

  • Jiahui Tang, Analog Design Engineer, Texas Instruments

  • Jinal Shah, Co-founder, Indiesemic

  • Kang Xin, Developer, Ericsson

  • Lauren Waslick, Director of PCB Design, Newgrange Design

  • Liwei Zhao, HSIO System Modeling & Signal Integrity, Astera Labs

  • Majid Ahadi Dolatsara, Machine Learning R&D Engineer, Keysight Technologies

  • Matthew Haber, Co-Founder & CEO, Cofactr

  • Mayuresh Patki, SMTS Systems Design Engineer, AMD

  • Michael Derrenbacher, Design Verification Engineer, Texas Instruments

  • Naga Suryadevara, Principal EMC Engineer, Stealth AI Startup

  • Nicholas Matsumoto, Software Developer, Tektronix

  • Nikul Shah, Founder, Indiesemic

  • Priya Vemparala Guruswamy, MTS Silicon Design Engineer, SI/PI Applications, AMD

  • Qian Ding, Silicon Packaging Design Engineer, Intel PSG (Altera)

  • Ramnath Donthi Sanath Kumar, Hardware Engineer, Apple

  • Saish Sawant, Staff System Electrical Engineer, ZT Systems

  • Scott Witcher, Signal/Power Integrity Technical Staff, Chipletz

  • Seunghun Ryu, Ph.D. Student, Korea Advanced Institute of Science and Technology (KAIST)

  • Sukanta Dey, Senior EDA Tools Software Engineer, Intel

  • William McCaffrey, Digital Hardware Manager, Northrop Grumman

  • Xiuguo Jiang, Keysight SE Manager, Keysight

  • Yuandong Guo, Senior Member of Technical Staff, SI Engineer, AMD

The DesignCon 40 Under 40 program is sponsored by Amphenol, Samtec, and Design News.

DesignCon will be held Jan. 28-30. For more details, please click here.

About the Author

Daphne Allen

Editor-in-Chief, Design News

Daphne Allen is editor-in-chief of Design News. She previously served as editor-in-chief of MD+DI and of Pharmaceutical & Medical Packaging News and also served as an editor for Packaging Digest. Daphne has covered design, manufacturing, materials, packaging, labeling, and regulatory issues for more than 20 years. She has also presented on these topics in several webinars and conferences, most recently discussing design and engineering trends at MD&M West 2024 and leading an Industry ShopTalk discussion during the show on artificial intelligence. She will be moderating the upcoming webinar, Best Practices in Medical Device Engineering and will be leading an Automation Tour at Advanced Manufacturing Minneapolis. She will also be attending DesignCon and MD&M West 2025.

Daphne has previously participated in meetings of the IoPP Medical Device Packaging Technical Committee and served as a judge in awards programs held by The Tube Council and the Healthcare Compliance Packaging Council. She also received the Bert Moore Excellence in Journalism Award in the AIM Awards in 2012.

Follow Daphne on X at @daphneallen and reach her at [email protected].

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