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DesignCon Engineer of the Year Looks to Give Back

DesignCon Engineer of the Year Looks to Give Back
Winner of the DesignCon 2019 Engineer of the Year Award, Intel engineer Vishram Pandit, wants to raise awareness of signal and power integrity issues.

Vishram Pandit's goal is simple: Share knowledge with the technical community that will one day create the CPUs for next-generation cars, phones, and servers.

Pandit, winner of the DesignCon 2019 Engineer of the Year Award, believes that the sharing process is critical right now, especially in the area of signal and power integrity. There, he said, the need is growing greater, both academically and professionally. “We need to have more people and more engineering teams working in this area,” he told Design News. “But there are very few schools with this type of curriculum.”

DesignCon 2019 Engineer of the Year, Vishram Pandit: “If you want to do faster computing, then you have to make sure you’re meeting the noise targets.”  (Image source: Vishram Pandit)

Indeed, Pandit himself learned the way most of his contemporaries did -- over many years. Starting as a raw 11th-grader whose college board scores ranked him 16th out of the hundreds of thousands of students who took the exam in Bombay, India. Pandit earned his way into the prestigious College of Engineering, Pune during the 1980s. There, he took the traditional coursework of an electrical engineering undergrad. Later, at the University of Utah's College of Engineering, he focused on electromagnetics, RF, and microwave engineering.

His formal education, however, served only as a foundation. His knowledge of signal and power integrity came later, through years of on-the-job experience. His early work was in instrumentation and controls, where he was first exposed to the nascent field of signal and power integrity. Later, he benefitted from knowledge-sharing opportunities at many conferences, such as DesignCon.

“In the past, you could do it that way,” he said. “If you had electromagnetics, RF and microwave engineering in your background, you could apply those concepts directly to your work.”

But that approach may no longer be good enough for the next generation of engineers, he said. “Frequencies are increasing quite a bit and there will be challenges in the signal integrity and power integrity field,” he told us. “When I was at Hughes Network Systems in 1997, we were talking about frequencies of 400 MHz, or maybe 800 MHz. Now, we’re talking about 56 GHz.”

Pandit is trying to help build community knowledge through prodigious publishing efforts. In little more than a decade at DesignCon, he has published or co-published 19 technical papers, including three that were finalists for the Best Paper award, and three more that were winners. In 2008, he was a co-winner for Best Paper award for “Simulation and Characterization of Gigahertz On-Chip Power Delivery Network.” In 2009, he followed with another Best Paper award for “SSO Noise, Eye Margin, and Jitter Characterization for I/O Power Integrity.” And in 2014, he again was a co-winner for “Analysis and Correlations of Supply Noise and Jitter Impact on DDR3L Memory Interface.” He has also served as a member of the Technical Program Committee at DesignCon since 2010 and as a track organizer since 2012.

Those experiences, combined with his daily role as platform architect at Intel Technology India Pvt. Ltd., have provided Pandit with a view of the future of electronics. And in the next few years, he believes, signal-and-power-integrity engineers will face an unprecedented set of challenges, largely based on the industry’s hunger for faster computing. Those challenges include higher speeds of interfaces, lower operating voltages, tighter specs, and greater cost pressures. Moreover, the challenges will apply to virtually all state-of-the-art devices, including cars, phones, tablets, and servers.

“If you want to do faster computing, then you have to make sure you’re meeting the noise targets,” he said. “It’s very important for the future generation of electronics.”

This year, Pandit will get to share his knowledge again, not only as a track organizer, but as a co-presenter. He will serve as part of a session, Electronic Integrity for LPDDR5 Memory Technology, which looks at the challenges of memory technology for low-power, small-form-factor designs.

More important, he will do his share to bolster academic awareness of signal and power integrity through the $1,000 scholarship he wins as DesignCon Engineer of the Year. He plans to donate the scholarship to the University of Utah in Salt Lake City. His hope is that it will help set the stage for more academic recognition of signal and power integrity.

“I’m happy I’ve had the opportunity to give knowledge back through the publication of a book and papers at different conferences,” he said. “The idea is always to be giving back to the community, to the young engineers.”

Senior technical editor Chuck Murray has been writing about technology for 35 years. He joined Design News in 1987, and has covered electronics, automation, fluid power, and auto.

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