Market research reports show that 10% or more of all FPGAs are used by military and aerospace systems. Clearly FPGA provides major advantages in the flexibility to adapt to changing standards and mission-critical requirements, which is essential for systems that may be in design for years and deployed for a decade or more. However, FPGA chips suffer some significant shortcomings, particularly for aerospace/defense applications. For example:

Fortunately, a technology has emerged to solve these problems: embedded FPGA. A handful of companies have successfully developed embedded FPGA IP that allows RTL to be updated at any time during the chip design process, even in system. This innovative new technology integrates FPGA into an SoC, which allows power to be reduced (by eliminating SERDES/PHYs that draw most of the power) and eliminates the packaging to enable smaller and lighter solutions.

Traditional FPGAs have been widely used in systems since the 1980s and, at the system level, provided flexibility and programmability different from what processors could do. The time has now come for this technology to be integrated -- similar to what ARM did with processor chips in the 80s. Back then, ARM took the idea of a processor chip and offered a processor architecture, which could be embedded in chips. Although it took time, embedded processors soon became nearly ubiquitous. 

The same market transition is now taking place with embedded FPGA technology, providing chip designers with an option to improve the reliability, power, and size of their systems. While this technology is expected to become mainstream in many markets, the first customer to announce that it would use it was DARPA. When DARPA announced a license for all government performers earlier this year, that put embedded FPGA technology on the fast track to becoming a widely used building block in government ICs.

What is Embedded FPGA?

Traditional FPGAs combines an array of programmable/reconfigurable logic blocks in a programmable interconnect fabric. In an FPGA chip, the outer rim of the chip consists of a combination of GPIO, SERDES, and specialized PHYs such as DDR3/4. In advanced FPGAs, the I/O ring is roughly 1/4 of the chip and the “fabric” is roughly 3/4 of the chip. The “fabric” itself is mostly interconnect in today’s FPGA chips where 20-25 percent of the fabric area is programmable logic and 75-80 percent is programmable interconnect.

In contrast, an embedded FPGA IP block is just the “fabric” now integrated into any IC. Furthermore, an embedded FPGA connects to the rest of the chip using standard digital signaling, enabling very wide, very fast on-chip interconnects.

How Can Embedded FPGA Be Used?

Because of its advantages, embedded FPGA is gaining significant traction in the military and defense markets. But there are a wide range of applications ideal for embedded FPGA, from very large networking chips down to small MCU/IoT chips. If you look at 40 nm with applications such as MCU/IoT, the emphasis is on power. Thus, embedded FPGA companies optimize their products to have more power management modes, low voltage state retention, and other features.

In 28/16-nm applications, the emphasis is on performance so embedded FPGA companies optimized for that. I/O requirements tend to be very large, especially on inputs. A relatively lower performance requirement is I/O control, such as in a MCU or IoT, where embedded FPGA can enable local processing of I/Os to reduce the overall system power by not having to activate the MPU or where it can implement additional serial I/O functions as needed. An intermediate application is where the embedded FPGA is a block of reconfigurable RTL on a processor bus.

Using Embedded FPGA to Fit Your Needs

Embedded FPGA is available now on several mainstream processes such as TSMC 16-, 28-, and 40-nm offerings. For aerospace and defense applications, embedded FPGA companies can “port” their embedded FPGA architectures to any CMOS process, including using a Rad-Hard cell library, including USA and Trusted Fabs, in six months or less.

One key advantage of embedded FPGA is the ability to allow customers to design chips in whatever size or configurations array they require. FPGA chips come in a wide range of sizes and customer applications will need a wide range of embedded FPGA sizes and options.

One way this can be achieved is by using tileable building blocks of cores of stand-alone FPGAs. In this sort of configuration each core has an extra top-layer of interconnect that allows one core to connect automatically to surrounding neighbors to make a large array up to NxN.

An array can be all-logic or all-DSP or any mix of the two types of cores: It is also possible to embed large amounts of RAM in the embedded array. One method of achieving this is by using standard RAM compilers to generate any kind of RAM that the customer requests (single port, dual port; ECC/parity/none; as much as wanted) and positioning the RAM between the cores. 

Using the above approach allows a few cores to generate an almost limitless variety of embedded FPGA arrays to suit any customer requirement.

Geoff Tate is the CEO of Flex Logix, a provider of solutions for reconfigurable RTL in chip and system designs using embedded FPGA IP cores and software.