DAC 2024: EDA Enabling Systems of the Future
Latest EDA tools tasked with addressing higher speed, power, and design complexity.
For years, the Design Automation Conference highlighted new or enhanced PC board design or simulation programs as productivity aids for engineers designing ICs and systems. But as today’s electronics industry frontiers gravitate to high-speed computing and AI, EDA tools must address not only the product design but also the production and data ecosystem.
At this year’s Design Automation Conference at the Moscone West exhibition hall in San Francisco June 23 through 27th, the latest innovations in electronic design automation will be displayed in numerous keynotes, technical sessions, exhibitor forums, and booth exhibits.
Here are some interesting presentations and discussions to check out.
-On Monday, June 24th, at 9 am, Jim Keller, CEO of Tenstorrent will deliver the first keynote, “Building AI With RISC-V,” discussing how those processors can play a role in the design of robust AI and machine learning systems.
-On Tuesday, June 25th at 9 am, Dr. Gary Patton of Intel will present a keynote titled, “Systems Foundry - a journey from 'System on a Chip' to 'System of Chips'” that will delve into the concepts driving the vision of a systems foundry, including a standards-based approach to assemble heterogeneous dies. Dr. Patton will cover the factors such as reticle limit, thermal constraints, cost, yield, etc., that are crucial to satisfy the demands of high-performance computing designs in the AI era.
-The all-important topic of AI in product design will be discussed in an Exhibitor Forum titled, “Leveraging AI/ML for Electronic Design and Simulation,” taking place Tuesday, June 25 at 1:45 pm. This session, led by Ansys CTO Prith Banerjee, will discuss practical applications of AI/ML for electronic design and simulation, and how this trend will determine EDA's future direction.
-Another topic is the escalating power needs required for AI and machine learning. In a Tuesday afternoon panel session titled “Blackout – Managing kW Power Budgets,” speakers from Siemens, Movellus, Empower, Marvell, and Tenstorrent will examine what’s behind the immense leaps in silicon-on-chip (SoC) on-die power, as well as the tools, design flows, and methodologies required to manage SoC and system power budgets.
-The rise of chiplets for system design will also be discussed in an exhibitor forum late Tuesday afternoon, in a presentation by Blue Cheetah Analog on chiplet interconnect solutions that support single-vendor, multi-vendor ecosystem, and plug-and-play approaches. The talk will outline how OEMs and chip makers can successfully navigate a multi-vendor ecosystem approach to implement chiplet-based designs.
-The final DAC keynote is Thursday at 9 am, when Sartita Adve of the University of Illinois at Urbana-Champaign will deliver a talk titled, “Enabling the Era of Immersive Computing.” The session will discuss the demanding, often conflicting needs to balance power, latency, and memory to handle technologies such as augmented reality, virtual reality, mixed reality, digital twins, and spatial computing. It will touch on several research projects Adve is currently involved in.
For more information on the Design Automation Conference, go here.
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