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FPGA Programming

September 11, 2017 to September 15, 2017
Continuing Education Center
Rohde & Schwarz USA Inc.

Louis Giokas

Louis Giokas started out in the aerospace business holding positions in development and management. At General Electric Aerospace (now part of Lockheed Martin) he held positions of software engineer... More

In this course we will go over the process and tools used to program Field Programmable Gate Arrays (FPGAs). FPGAs are very flexible devices which consist of large arrays of logic elements which can be connected in arbitrary ways. The devices can also be reprogrammed on the fly, in the field, allowing them to implement different or improved algorithms. 

One has to be careful on terminology, though. Programming typically means writing a program in some high, or low, level language. While we use a form of software to specify what we want the FPGA to do, the term programming has another meaning. For a FPGA, programming is the process of applying a bit pattern to the chip which controls the action of the "switches" that control the flow of data. 

We will look at the whole process of developing that bit pattern and applying it to a device.  In this course we will have examples from a number of vendors, such as Xilinx, Intel and Microsemi. 

September 15 – Day 5 – Programming the Chip

Now that we have an algorithm developed, debugged and laid out in our design tolos we are ready to transfer that to the FPGA chip and run our algorithm there. We will also discuss the process of reprogramming the chip during operations and will discuss how that might be used.
September 15, 2017 - 2:00pm EDT

September 14 – Day 4 – Synthesis and Layout

Once a design has been developed in a HDL and tested and verified, we need to lay it out on the chip. This is analogous to layout for ASICS but it is not as complicated since we are using an existing regular structure. Layout is important because of the effect on performance and the interaction of...
September 14, 2017 - 2:00pm EDT

September 13 – Day 3 – HDL

Algorithms for FPGAs are specified via a Hardware Description Language (HDL). We will look at a couple of these, VHDL and Verilog. Many design tool sets support both. The one you use will depend on standards and skills available in your shop. We will also look at some of the tools used to convert...
September 13, 2017 - 2:00pm EDT

September 12 – Day 2 – Design Flow

The flow of design tasks will be somewhat dependent on the FPGA vendor and tool set, but there are some general steps that are generally followed. We will start with these general steps and then look at some of the particular vendors. There are also various options in the design flow from any...
September 12, 2017 - 2:00pm EDT

September 11 – Day 1 – Intro - FPGA Device Description

We start with an introduction to the class of devices called FPGAs. The layout and design of several types and critical parameters will be described and discussed. It is important to understand the way the device is constructed to develop effective algorithms.
September 11, 2017 - 2:00pm EDT
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