Louis Giokas

Louis Giokas started out in the aerospace business holding positions in development and management.  At General Electric Aerospace (now part of Lockheed Martin) he held positions of software engineer, systems engineer and staff engineer. While there he worked on spacecraft and military systems. Prior to that he worked for companies such as Sperry UNIVAC and Link Simulation Systems, also working or spacecraft and military systems. Over the past two decades he has worked in the database management software area for Oracle and IBM. Over the past several years he has worked on development projects and has consulted in a number of different areas, including embedded systems. He is a long standing member of the Institute of Electrical and Electronics Engineers (IEEE). Currently, he is the secretary of the Fox Valley Subsection of the Chicago Section and chairman of the Computer Society of the Chicago Section. He has a degree in Computer Science from Villanova University and is pursuing a MS in Applied Statistics from DePaul University.

September 21 – Day 5 – Solutions and Future Directions

Standards can be used to help mitigate safety and security concerns. Many are developed precisely for this purpose. In this talk, we look at the types of standards involved and discuss their impact on the IIoT in terms of the protocol stack, system architecture, and implementations. Finally, we...
September 21, 2018 - 2:00pm EDT

September 20 – Day 4 – Data Theft and Attacks

At the heart of any enterprise today is data. IIoT systems produce very valuable data. As is well known, attacks on infrastructure are on the increase and pose a number of problems. In this class, we will look at the problems associated with theft of that data as well as attacks that might disrupt...
September 20, 2018 - 2:00pm EDT

September 19 – Day 3 – Security Concerns

In this lecture, we will consider security in the industrial setting. Because these are basically control systems, we will approach security from the point of view of those systems. This can include physical security as well as communications and other electronic devices.
September 19, 2018 - 2:00pm EDT

September 18 – Day 2 – Safety Considerations

Security goes with safety in the IIoT. If the systems are not secure, then safety cannot be ensured. Security is not a sufficient condition for safety, but a necessary one. In this lecture, we will look at a number of safety considerations and their impact in security concerns.
September 18, 2018 - 2:00pm EDT

September 17 – Day 1 - IIoT Landscape

In this class, we will detail the environment under consideration. The Industrial Internet of Things (IIoT) is a subset of the Internet of Things (IoT) with very specific requirements. In this environment, safety is a big concern. In addition, there are generally a number of communications types...
September 17, 2018 - 2:00pm EDT

September 15 – Day 5 – Programming the Chip

Now that we have an algorithm developed, debugged and laid out in our design tolos we are ready to transfer that to the FPGA chip and run our algorithm there. We will also discuss the process of reprogramming the chip during operations and will discuss how that might be used.
September 15, 2017 - 2:00pm EDT

September 14 – Day 4 – Synthesis and Layout

Once a design has been developed in a HDL and tested and verified, we need to lay it out on the chip. This is analogous to layout for ASICS but it is not as complicated since we are using an existing regular structure. Layout is important because of the effect on performance and the interaction of...
September 14, 2017 - 2:00pm EDT

September 13 – Day 3 – HDL

Algorithms for FPGAs are specified via a Hardware Description Language (HDL). We will look at a couple of these, VHDL and Verilog. Many design tool sets support both. The one you use will depend on standards and skills available in your shop. We will also look at some of the tools used to convert...
September 13, 2017 - 2:00pm EDT

September 12 – Day 2 – Design Flow

The flow of design tasks will be somewhat dependent on the FPGA vendor and tool set, but there are some general steps that are generally followed. We will start with these general steps and then look at some of the particular vendors. There are also various options in the design flow from any...
September 12, 2017 - 2:00pm EDT

September 11 – Day 1 – Intro - FPGA Device Description

We start with an introduction to the class of devices called FPGAs. The layout and design of several types and critical parameters will be described and discussed. It is important to understand the way the device is constructed to develop effective algorithms.
September 11, 2017 - 2:00pm EDT

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