Alaskaman66- Some good questions.The Platform Manager uses the current sense circuitry and the on-board FET to sense and control current onto the board. If the spikes are long enough it can easily manage board insertion/removal events. All timing is programmable- ramp rate too. Energy storage needs to be done external (super cap maybe?).
The Power to You book is a great reference and should be able to answer your questions in precise detail. It is available for free here.
With the Lattic platform manager, I have some questions. On board removal, does the LPM mitigate any voltage spikes, say from an inductive or capacitive load? Is there any sort of sequenced regulator turn off or energy storage capability, to make sure, for example, that the MCU is the last thing to lose power and has time to do POST? Also, does the FET switch stay off until the 12V bus stabilizes upon board re-insertion? Can the LPM monitor input voltage or current and disconnect via the FET upon seeing excessive excursions in either input voltage or system current? Are those parameters programmable?
@Alaskaman66- The comparitors can typically be set to fairly precise levels. Some devices have automatic windowing functions to so you can tell if a voltage is 'out of range' prior to sending an interrupt to the controller.
Alaskaman66- MCUs tend to have a larger number of bits and better conversion times (since the try and target audio applications and above). The devices covered today are more targeted at sensors and slower applications like that...
DouglasEaton- I'm stuck using a PC for my hardware projects too. I wish the Mac was better supported. Running in emulation mode might work- I have not tried it... Larger FPGA devices would probably be a problem however..
tomorrow i can't be able to attend because of our meeting at ASHRAE Oryx Chapter as one of the member of the BOARD OF GOVERNORS...But still, archive is there I can have a look and attend maybe before on the 4th day class...
By high power control, are you basically referring to switching voltages above the supply voltage for the chip? Say 120 VAC or 48 VDC? I imagine a high current (power) aplication would still require an external device, such as a solid state relay.
Warren - great presentation. Rob, Thanks for keeping me on track with the slde numbers - came in handy as I kept rebooting the presentation to hear the audio = tomorrow I will hard-boot with my work boots on! :-)
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Digital healthcare devices and wearable electronic products need to be thoroughly tested, lest they live short, ignominious lives, an expert will tell attendees at UBMs upcoming Designers of Things conference in San Jose, Calif.
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