But how good are the results of these tools. I ofter heard from people experimenting with autogenerators/translators, that the effort correcting the results of them was higher than the manual porting. At which level are these statements correct? And how matured are those tools nowadays?
There were a few constructs depracated, but that was because they were very rarely used. SV should accept all legal Verilog except for those. Sorry I am not of the list of features that were depracted.
What are compatability / portability issues? Say I have a design from 2006 that a customer wants to use as a baseline and add features and functions to today in SystemVerilog, with the code as a deliverable?
There was a question about SystemC having a hole. Not sure I understood the question.
I was reffering to the "design gap" between a systemC model and the porting towards HDL. If I understood the 'caveats' slide correctly, I'd assume that there exists a similar gap regarding the workflow inbetween the single parts of the systemverilog language as well. Or ist more complete (OOP -> RTL)?
what is the difference between UVM and systemverilog standard class based verification? Can I use these methods to verify a small design ? I need to get started with systemverilog and looking forward to know how to get handson ?
Has constraint compilation improved with the use of SV? I remember with Specman (e) that sometimes the tool would try to resolve your random constraints for 30min, only to let you know at the end that you had a deadlock...
The big difference is the way it does checking and the default condition. Impllied registers used to be created for cases that were not covered and that was nnot always wanted."comb" says there should be no register.
Ah Superlog. Some of my old buddies were at that company - the original Hilo team. Phil Moorbey then left the team and created a new version that was called AidSim. Anyone want to guess what it was renamed when the aids epidemic hit the headlines?
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@brian_bailey: I'm just here for the chat this early. Sometimes there are some good questions asked. Other times we talk about coffee. I don't have an espresso machine. And I'm happy they took out the sugar alcohol from the sugar free coffee flavors. Sugar alcohol is still sugar and I'm on insulin.
Truchard will be presented the award at the 2014 Golden Mousetrap Awards ceremony during the co-located events Pacific Design & Manufacturing, MD&M West, WestPack, PLASTEC West, Electronics West, ATX West, and AeroCon.
In a bid to boost the viability of lithium-based electric car batteries, a team at Lawrence Berkeley National Laboratory has developed a chemistry that could possibly double an EV’s driving range while cutting its battery cost in half.
For industrial control applications, or even a simple assembly line, that machine can go almost 24/7 without a break. But what happens when the task is a little more complex? That’s where the “smart” machine would come in. The smart machine is one that has some simple (or complex in some cases) processing capability to be able to adapt to changing conditions. Such machines are suited for a host of applications, including automotive, aerospace, defense, medical, computers and electronics, telecommunications, consumer goods, and so on. This discussion will examine what’s possible with smart machines, and what tradeoffs need to be made to implement such a solution.