Where are we between the OS Kernel, File Systems and Solid State Memory Technology. Hard Disk Drives have embedded controllers. Some applications use the concept of an I/O Controller. How much isolation (abstraction) does the application programmer need, want, have available. Micrium provides approaches to [some of] these issues, it would be good to walk through a few slides on where we are ... http://micrium.com/
@kentj: Glad you could learn a thing or two. You might even be able to grab more info if you can understand the slides I had to skip. The K-AST article would help for that.
ThomD Would like to hear more about parts with built-in ECC - such as Micron M60 (4 bit ECC) and ClearNAND - and flash translation layer changes to match this.
Well your FTL needs to support this of course. Ours allows you to specify zones to avoid in the spare area so that the device can store its ECC without overwriting other metadata. Software ECC of course needs to be disabled. Most devices will report ECC status through their status registers so that you will have to read the status register after read operations and also enable the on-chip ECC feature at initialization through some command (Get/Set Feature).
Regarding bad block management, some NAND vendors recommend "scrubbing" when the corrected error count gets close to the maximum detectable. FTL or controller firmware should handle that function.
vsrollins: Good thing, not using ECC really is a bad idea, esp. with MLC or TLC devices. While it may work when immediately reading a programmed page, I wouldn't expect the data to remain valid very long.
Hi rikaspinall - There are 3 additional resources in the "educational resources" section on this page. We'll also be sending out an email to you all early next week with some more resources.
ThomD: A FAT file system can notify the underlying FTL when it is no longer using a block through a "discard" interface. After that, these blocks no longer need to be wear leveled.
This series has been great. Would you have any good books/appnotes/online sources which would supplement this knowledge? I'd be interested in example code or routines too. Thanks Eric - Rik
ThomD: I unfortunately don't know. There are also other types of FTLs, and usually companies will not really give much detail about what they're using.
Excellent breakdown on the various penalties! Some OS have built-in Flash Translation Layers (WinCE, Nucleus, Linux has many) - can you say which is which?
The client's software engineer handles the NAND programming, but I'm trying to come up to speed on these issues to assist with integration and system troubleshooting.
A FAT file system can notify the underlying FTL when it is no longer using a block through a "discard" interface. After that, these blocks no longer need to be wear leveled.
Alaska: Each cell can have four (or eight) possible levels (amounts) of charge on the floating gate and the read amplifiers can distinguish all of those levels.
Using NAND. Ran into the BER issue a few chip revisions ago. Software engineer was convinced ECC was unnecessary, but after much back and forth with vendor, datasheets, and ONFI standards finally saw reason.
Would like to hear more about parts with built-in ECC - such as Micron M60 (4 bit ECC) and ClearNAND - and flash translation layer changes to match this.
@alanta luck has for the last six years, but i expect, as they get worn, they'll start giving problems. just replace the boards. again, they are not being used that much, only once a mission, not continuous random access.
drrowley_lpe: If your system is running successfully with ECC, consider yourself *VERY, VERY* lucky. Most NAND Flash absolutely depends upon ECC to handle the routinely-occurring single-bit errors.
developed 4GB and 24GB nand flash cards, with systems up to 480GB, with no ECC. Found ECC to be very processor time heavy and complicated. each page does have crc. it several hundered missions, there has been no errors detected. the flash are setup to write in sequence, not random, and in each mission, only one page will be used.
@bitbanger55: When I checked the data sheet for Cypress FRAM it turned out to be the Ramtron data sheet so either Cypress bought Ramtron or it is mismarked on the Digi-Key website.
For my audio to work: I have to click the play button on the streaming audio player twice (2nd after the blog talk radio audio) to get it to stream for me. My company finely let the audio through last year.
The streaming audio player will appear on this web page when the show starts at 2pm eastern today. Note however that some companies block live audio streams. If when the show starts you don't hear any audio, try refreshing your browser.
@bitbanger55 - I saved it with LibreOffice and it shrank to 327K. But all the graphic elements now have a badly offset shadow. Looks like I'm viewing a 3D movie without the 3D glasses. Saving as pdf shrank it to 1.8M and that looks fine.
Be sure to follow @designnews and @DigiKeyCEC on Twitter for the latest class information. We encourage you to tweet about today's class using the hashtag #CEC.
@StephMcGUBM - I second @ucschmidt's motion. Two minutes would be acceptable, five minutes would be better. If starting the audio stream before the hour is a problem, I would rather have music start at the hour, and the presentation two minutes later.
@Lauren Muskett.... Many individuals have suggested starting the player with music several minutes early. This will give us some time to get the audio working before the the lecture starts. This week I have been missing the first several minutes every day. Missing the introduction makes the rest harder to follow.
The streaming audio player will appear on this web page when the show starts at 2pm eastern today. Note however that some companies block live audio streams. If when the show starts you don't hear any audio, try refreshing your browser.
Sorry everyone about the last minute slide deck update. I don't know why it's so big, my version is in .pptx and takes only 377KB. I've checked and they do look fine, however.
Day 5 slides seem to have lots of NAND flash technology background - it will be interesting to hear in the lecture how much of this an embedded system designer needs to actually deal with vs. it just being nice to know.
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