Looking forward to see last presentation. Thank you!

I like the concept of future FPGA features

Hello from Oregon

Interesting comment that RT systems must be deterministic. Many of the scheduling algorithms fall into the NP class -- which is non-deterministic -- or so I would think.

I like Max style of delivering things. Great approach 

You should mention several compaines making these products. It will be helpful for us. Thanks for great lecture. 

Advanced / Future FPGA's look intriguing.  What power ratings are we looking at?  Heatsinks, Fans?

As the tools develop for FPGA's with hardware library and algorithm libraries and perhaps more graphical or model based design they may be viable depending on non-recurring and recurring costs.

Same comments on 'self documenting' presentation - please consider separate slides for your verbal descriptions to capture your presentation for later reference -- all good stuff still ...

The P.I.D. algorithm question's answer should note that PID filers are or should be made to be 'tunable'.  It comes back to the issues of accuracy and precision (how close to the exact set point do you need to get and stay without oscillation for example).  The startup problem like also 'special cases' is usually also addressed in all PID algorithms.  Choosing a 'P' - proportional setting such as 50% which is halfway between the starting point (first measurement) and desired point (temperature, fill position etc.) implements a sort of 'binary search' to move closer to the set point.  In seeking the set point, now the parameters for 'I' Integral which is a sort of running average, and 'D' Derivative which is the slope or rate of change can be determined.  In addition, prior knowledge of the controllers and sensors and other elements in the control system help to determine values for PID set points.  There are many good tutorials on PID and PID tuning online - enjoy!

Side note -- Labview has FPGA capabilities - see for example http://www.ni.com/fpga/ or do a web search as there are other specific white papers/app notes and information online in general and at National Instruments (NI's) website.

good day all

Please max suggest some books about to learn fpga

Thanks Max & Alex

Thank you Max!

ALso, is there anything on the error rates in code for VHDL vs high level languages ??

is there anything on the learning curve for a VHDL language and C/C+ or even assembly on a uP ??

See you all tomorrow.

One of the things to do for FPGA's would be to consolidate the HDL for them.

Using enough FPGA's you should be able to replace all the other ASIC's, uP, etc..

FPGA's seem to be the up and coming do all

hi again

So long.  C U Then.

By all - -C U tomorrow -- Max

Someone said: "I might suggest asking attendees to stop "thanking" as it clogs the message board."

True, but it does make me very happy and, after all, isn;t that what we're all here for (to make me happy)?

We could always replace the "thanks" with outrageous complements as to my good looks and rasor-like wit (I'm 1/2 man, 1/2 beast, and 1/2 wit :-)

Max, many thanks to you Sir.

Bye all......Tomorrow

Still clinging to what left here too. ttfn, see all tomorrow.

Someone said "Max, if you don't mind please give us some books about the FPGA"

I'll ad dthsi to the list of books I give out tomorrow

@danlafleur "not really good for the reputation :-)"

I think that ship has sailed in my case :-)

Someone said "Max, what is deiferences between Verilog HDL and FPGA?"

HDL stands for Hardware Description Language. Unlike programming languages like C and C+ (which are inherently sequential in nature), a HDL is designed to represent the way in which hardware works -- concurrentkly, which means that multiple things can be happening at the same time.

We use HDLs like Veriloh, VHDL, SystemVeriloh, or UDL/I (from Japan) to capture the intent of our design -- then we use logic synthesis to take this high-level representation and generate a gate-level equivalent.

ASICs and FPGAs are silicon chips -- we use the gate-level output from the systhesis tool to either (a) build a new ASIC or (b) program / configure an FPGA.... thsi is a simplistic description but I hope it helps

Max, if you don't mind please give us some books about the FPGA.

I appreciate.

As a constructive criticism, it would be helpul toshow for each bullet, the talking points being discussed. Coming from a classical bkground, I'm trying to picture the ladder during the several minutes that the topic is being discussed... looking at only the highlighted topic. When we get to a meatty slide, Max says it is too complicated and moves on. Other times I'm staring at a pretty box for several minutes while the guts of the box is what I'm trying to picture. Also, I like my achronyms defined in print at least once.  Sometimes the presentation appears at a very high level, good for the boardroom, less so for practitioners. Every sentence had an "ah".   Having said all that, I'm grateful for the program. ggg

I might suggest asking attendees to stop "thanking" as it clogs the message board.

@Max, not really good for the reputation :-)

@MazianLab: As a simple analogy, think of it this way: Verilog HDL is to the C programming language what a FPGA is to the Intel (or Freescale or whoever...) processor

someone said "I'll be here tomorrow with bells on!"

can you post a picture? :-)

Spmeone said: "I join Mr.E's request - a case study (in advanced course) sounds like a great idea.."

Let me think about this -- no promises -- it depends on how much time I have available (of course if you want to write it ... which is ithe point that people usually stop asking :-)

I'll be here tomorrow with bells on!

Max, what is deiferences between Verilog HDL and FPGA?

I join Mr.E's request - a case study (in advanced course) sounds like a great idea...

Someone said "all the advantages brought by self-modfying FPGAs carry the cost of much more need for security. Or you'll end up with "easter egg" control settings that shut down the production line"

Make sure you come back for the Safety and Security part of our course tomorrow :-)

consult International Society of Automation - Publications

hierarchy of control to supervisory level

@Island_Al "I still love  TTL!"

ME TOO !!! :-)

@syakovac, "virtual peripherals"! I like the idea of high speed hw and programmable configurations. A small example is a fairly fast uC Parallax SX chip and peripheral blocks defined in software. The uC can keep up quite well with normal applications.

Someone said "I'm still unclear as to why one would use FPGAs to emulate SoC when the SoC already exists in hardware"

I think it's more a case of when you are designing a new PLC or PAC or SBC for an industrial control application -- if there's already an exuisting SoC (ASIC / ASSP / whatever) that does everything you want then you woudl use it. But if the existing SoC doesn;t do what you want ... it will cost millions of dollars and at least 18 months to develop a new one -- or you can get an off-the-shelf FPGA and program it to do whatever you want it to do... 

all the advantages brought by self-modfying FPGAs carry the cost of much more need for security. Or you'll end up with "easter egg" control settings that shut down the production line.

OK Max, I still love  TTL!

Just a request: if not tomorrow, then maybe in the Advanced course in a couple of weeks, could you run a case study from requirements to implementation and emphasize the design trades you made and the reasons for each, so we can get our arms around when to use a PAC, when a PLC is good enough, and when the added power of an FPGA or SBC justifies the increased complexity and risk?

OK, everyone, I got to go. e-C you all tomorrow.

thanks Max

@syakovac Thanks for your thoughts.  Something for me to ponder tonight.  CU tomorrow.

@danlafleur -- I have wanted to make a uC/FPGA system with some flash storage capable of "loading" high powered peripherals from the storage.  I think there could be some advantages to be had but I have not seen the project that wants it yet so I have not tried the experiement.

Thanks Max.  Excellent presentation yet again.  See you tomorrow.

@Max: Would you be able to discuss any control system architecture - either a PLC, PAC or DCS. with actual connections ( Field devices-junction box, analog/digital marshalling cabinets, buses, controllers, HMI) ? Or upload any ref. materials ?

Someone said "Guess I'm resistant to new technology.  I didn't think much of transistors in the 60's either!"

I know folks who grew up with vacuum tubes and couldn;t make the transition to transistors. And I know guys who designed digital logic with transistors but thought 74-series logic gate ICs were too confusing and wouldn;t switch...

OK, thanks Max. looks like very new and complex technology right now for self-modifying FPGA. I'll stay tuned.

@Island_Al  Yes, I agree with you for low runners vs. high runners for volume.  Large runners tend to like ASICS and dedicated hardware.  FPGAs can be piecewise expensive but I am seeing them come down and Altera has even tried to make it so that you can "convert" to an ASIC with a different press of the large gree button.

Design or scale of Problem vs. type of solution used....... Development environment for assessing?

Someone asked "What is exactly the role of Terasic in the Altera Organization"

I have no idea -- I can barely keep on top of the various FPGA families everyone offers ... hav eyou asked Altera?

Thanks Max.  I would have liked more on the SmartFusion types of devices that are integrating some configurable analog blocks.  Still, good presentation.

Thank you Max and Alex..

@syakovac Makes sense in larger volume equipment, but I think more of runs of 5 to 10 units. Thanks for your explaination.  Guess I'm resistant to new technology.  I didn't think much of transistors in the 60's either!

Someone asked "Max, any thoughts on FPGA self-modifying code similar to uP/uC self-modigying code?"

Thsi is a very interesting area. Th eoriginal FPGAs could only be programmed in their entirity. Morte recently we have "partial reconfifuration" in which some parts of the FPGA keep on running while others are being reconfigured. When I was in Norway 2 weeks ago visiting th eUniversity of Oslo I saw some amazing things in this area. The problem this is a big topic in its own right -- way to complex to go into detail here (especiallc considering th efac tthat I am a two-fingered hunt-and-peck) typist

MAX: What is exactly the role of Terasic in the Altera Organization: Foundry or assembly line in Taiwan?

@Island_Al, I have seen some spins of the PCB but a lot of spins with the FPGA code in my past (Tektronix) and even fixes for field failures on existing products that cannot have PCB changes.

Given all of the attention to security (or a lack of) for SCADA, is there a future for SCADA or will SCADA be sunset along with other obsolete technologies?

thanks

Someone asked "What is the difference between L2 Cache and L3 Cache?"

Well, 3 -2 = 1 (grin)

Actually it's all a matter of proiximity and size. The L1 cach is spall, extremely fast, and tightyly coupled to the processor core(s). Th eL2 cache is bigger, not quite as fast, and a bit father away. And if you have an L3 cache its even bigger and a bit slower and even father away...

Thank you Max.

Thanks Max

consult International Society of Automation - Publications

Pyramid of control technologies:

Task Scheduler (highest level)

Real time optimization

Linear programming/ Quadratic programming

Ramper/Pusher

Model Predictive Control

Property estimators

Fuzzy logic

Auto tuner

Abnormal situation management system

Process Performance Monitoring System

Process Performance monitoring system

Loop Performance monitoring system

Basic Process Control system (Lowest level)

Any distributed Plant - DCs

For DCS (distributed control systems) plant automation an added consideration is interfacing these systems through the OPC ( Object Linking and Embedding for Process control) Standards for Industry.

OPC provides a common interface for all.

Max? Any insite that you can give into this?

Scada is data or event oriented DCS is process or time oriented

Inventory control is important for production demand

Thanks

Max, any thoughts on FPGA self-modifying code similar to uP/uC self-modigying code? I know it's dangerous in some applications. I'm just wondering if it's possible with current technology.

Thank you, Max

Thank you Max

Thanks Max, and thanks Frank.

@syakovac While the FPGA can be changed easily, you still need pinouts, thus a new PCB.  When I layout a PCB I use extra IO pins as spare for the uC chip.

Thanks Alex, thanks Ma.

The electric/optic engineering world is becoming almost as complex than our understanding of the infinity.

FPGAs at last!!! GREAT PRESENTATION...

Thank you, Max

Thanks Max

Thx Max

Excellent...

Thank you again

Thanks Max, great presentation.

Excellent Informative class!

Thanks Alexander.

Thanks Max

Great presentation! Thanks CMax!

thank you Max,

Max, thanks for another interesting presentation

Thanks Max.

Thanks Max & Alex.  Great lecture.

Thank you Max!

Thanks Max!

Thanks for a great session Max.

thanks Max, It's a great presentation!

Thanks Max!

Thanks Max

Great session, Max -- thanks!

PLC I/O are protected...

Head-spinning.  Looking fwd to safety systems.

Of all the presenters CMax is the best at queing the slides. I appreciate that. Thanks CMax

Some PLC are very cheap too under $99.

@ kavinjam - any I/O of any chip can or ar3 "protected"

What is the difference between L2 Cache and L3 Cache?

PLCs are Desktops and MCUs are Laptops..;)

@Island_AI, you can field update the FPGA and it is quick and easy to develop (much more like software development) than the big think and wait spin of PCB or ASIC development

PLC inputs/outputs are protected

Thx Mr. E  I understand the cert thing.  My latest project has TUV requirements and I am finding they are an extraordinary pain.

@raghu PLC are very rudged device and stable. 

I am gussing that PLC can withstand static voltages.. more robust.. is it so?

I'm still unclear as to why one would use FPGAs to emulate SoC when the SoC already exists in hardware and one would simply add the program rather than define the SoC in the FPGA and then still have to add the program.  What advantage am I missing here?  Perhaps by adding the hardware accelerator to perform higher precision or fast math?  It "seems" like one-off cost would climb rapidly using FPGAs.

All I have ever used as a Verilog reference has been the LRM from Synopsys or the Quick Reference Guide from Sutherland HDL

@syakovac: a couple of reasons to choose the simpler options like PLC or PAC might be cost (make vs. buy decision) or certifications (a commercially available unit may already have needed certifications that might be costly and/or time-consuming to achieve with a proprietary design based in an FPGA or SBC).

Yes.. you see,..if you get hold of one microcontroller good..it can do everything.. adc, opamp, dac,..interrups, daqing... why another PLC.. We really need to know the advantage of PLC over other means.

Design or scale of Problem vs. type of solution used....... Development environment for assessing?

@konato - That text looks like a good start.  I'll get it.  Thanks.

@raghu - with a uC, etc  i think that you can do even more

alright, verilog it is then, gotta dig deeper in the net for reference materials, thanks guys for the suggestions

Has anybody used the SmartFusion device?  What is the fitting limit like?  I have had bad experiences with Altera needing a larger part than Xilinx.  How does Actel stack up?

Broadly PLC is an industrial microcontroller.

Any simulation s/w for this scope of process controls? Say for ytaining purpose.

@raghu, good question.  I'm also wondering the same... I'm thinking PLC reliability.

I have been asking the same question as raghu.  I don't see any use for options other than SBC or FPGA

Verilog: http://www.amazon.com/Embedded-Design-Using-Programmable-Arrays/dp/1589094867

Hello,

I'm interested mainly in event-driven (discrete-event) systems and control and eventually in hybrid (time-driven and event-driven) systems and control. Could you recommend some engineering tools (similar to Matlab/Simulink for classical (continuous and discrete_time systems) - simulation and model-based design) for event_driven and hybrid systems which could also automatically generate code for certain processors (PLC, microcontrollers, microcprocessors, FPGA, etc.) or intermediate code (C, Ladder, FBD, etc. )? Thank you.

Okay, one big picture question.. What is that we can do with PLC that cannot be done with a microcontroller?

The nice thing about Verilog is that it is so similar to C that you probably already know Verilog with a few small syntax issues and then the monumental task of thinking in parallel.

@Anybody - Learning Verilog - any suggestions for good text material?

@KevinJam- Nevermind; thought you werw responding to snandu13

@steve@HA - you won... i give up... :)

consult International Society of Automation - Publications

@skakovac - Thanks for the suggestion.

Some FPGA companies: Actel, Altera, Lattice Semi, Xilinx

@Ran -- Verilog.  VHDL is a pain and is almost exclusively European and they are accepting more Verilog

@ snadu13 - VHDL: A Starter's Guide  - http://www.amazon.ca/VHDL-Starters-Guide-Sudhakar-Yalamanchili/dp/0131457357

Legal approach in permits caused Oil Spill by BP - Gulf of Mexico

DCS and PLC have been around for a long time. I think DCS can be associated  with process control (continuous and batch). PLC is more associated with machine control. It doesn't mean they don't cross domains.

@Anybody - Which is a better choice to learn - VHDL or Verilog?

@KevinJam- Ok, but can you also give the ISBN numbers?

I'm putting my money on Joe :)

@snandu13--Learn Verilog, download the free tools from Xilinx or Altera, push go and debug

@Joe... I'm not a PAC/PLC to become a master in master-slave configuration... and slavery (among humans) is kinda illegal... ;)

Pyramid of control technologies:

Task Scheduler (highest level)

Real time optimization

Linear programming/ Quadratic programming

Ramper/Pusher

Model Predictive Control

Property estimators

Fuzzy logic

Auto tuner

Abnormal situation management system

Process Performance Monitoring System

Process Performance monitoring system

Loop Performance monitoring system

Basic Process Control system (Lowest level)

:)

Can anyone suggest reading material for FPGA Programming - starter level?

@slk- now we are back on Genetic Algorithms

@Mr. E: or if there are multiple masters in the same bus, and master-slave coordination fails... more fun ensues ;)

@Mr.E - good point...

@slk--thanks

caa028 - you become the Master - fine with me.  I just did programming, commissioning etc.

@caa028 - it will be part of the learning process ... :)

@caa028: the master coordinates the slaves till it dies or a network fault garbles the commands to one or more slaves... then the real fun starts.

@slk - that's predictive control... :)

raghu, lots of applications in oil & gas gathering area with multiple wells pressures & flows be fed to common control room. Not much need for control, but data required for plant control

@ cmeadows6959 - next time do it 1/2h before the presentation :)

slide 11...

Say Fast Fouier Anaysis

SOUND!! AT LAST.. RESTARTED COMPUTER...

Waenig:  C+ vs. Visual C

@Joe... "master-slave" implies no problems with coordination (master coordinates the slaves)... the real problem is in coordination across the peers (no master to resolve the conflicts, etc...)

Why even scada now with so many daqs around?

As far as my knowledge goes, DCS can be programmed for both continuous and batch processing. This definitely helps food and beverage industries.

Another problems are in master-slaves coordinations.

hierarchy of control to supervisory level

I found DCS in cooling / heating processes in food

Any distributed Plant - DCs

SCADA is one of the oldest sytems.  Does it change (concept + hartware & S/W) in XXI century?

I can see DCS for power grid or oil production, but it is not so clear why it would help with food and beverage production. Can anyone shed any light?

Scada is data or event oriented DCS is process or time oriented

thanks

slide 6

still on slide 6

I thought that we were still on 6, but i had to refresh

NI, especially its LabVIEW is fine in integrations

which slide ple

For DCS (distributed control systems) plant automation an added consideration is interfacing these systems through the OPC ( Object Linking and Embedding for Process control) Standards for Industry.

OPC provides a common interface for all.

Max? Any insite that you can give into this?

Were are corporations' servers in the system with PLCs?

@Ranjitha Anand: Thanks for the IEC 1131-3 summary!

@bobybacs: That is an interesting question. I don't know. Apparently less than Sprint provides - no gaps or issues.

@slk: all included for normal monthly fee. I'm told Sprint is the last of the unlimited data holdouts.

Right = PC are good as a programmer basically

@Mr.E - and the bill ?

Yeah, but it had to originate somewhere

@Mr.E How much bandwith you need to listen an entire presentation ?

What PLSs have most application in UK?  USA = Rockwell and Modicon years 1990-2010

@krhohio: IEC 1131-3 is the international standard for programmable controller programming languages.

• Ladder diagram (LD)
• Sequential Function Charts (SFC)
• Function Block Diagram (FBD)
• Structured Text (ST)
• Instruction List (IL)

Just the basic theory behind the process of the computer

@krholio: My phone is a Samsung Nexus S 4G. It has a browser in it. I just navigate to Design News on my phone, login, and the audio magically begins.

@krhohio - I suspect he means streaming using the web browser on his phone

1131

the picture on slide 5 really helps the understanding...

i used pascal not too long ago ;)

@mwalls321- Predecessor and inspiration for the current architecture maybe?

What was the "IEC number" of the languages?

slide 5, but the audio isn't really centered on the slide... ;-)

In my "works" many t-shooting findings were in failures in scanning

yes

@caa028- Thanks

slide 5 ???

Sounds just like the architecture of a computer

@Mr. E: How do you listen on your phone?

caa028 -it's good to have "echo" thanks

What slide are we up to?

audo problem? reload the page.

Ladder Diagram:

http://www.engineeringexpert.net/Engineering-Expert-Witness-Blog/http://www.engineeringexpert.net/web/Engineering-Expert-Witness-Blog/wp-content/uploads//2012/02/Relay15.jpg

Hello everyone

@cook429667: I had perfect audio during the first course with Jon Titus back in January, then my organization blocked it before the second course started (without notice of course). There were no overt errors reported until I tried to access blogtalkradio.com directly from my browser. You may want to try that. Now I listen on my phone instead.

Sound didn't start immideately for me. I restarted broweser then it started about two minutes after I signed back in. It's always worked immediately in the past.

audio has been okay here

If you have no audio, check that  you can go to http://www.blogtalkradio.com/contactus.aspx. I have no audio because my IT blocks that site. I can sometimes listen after the class is over

in the audio panel of the presentation, check if you are not on "pause"  ...

in a circuit with many relays how is the issue of spike tackled

@JoeWojcicki... predicting your next comment - "it's the journey that's important, not the destination"

I am having audio problems..can't hear a thing.

no sound like class has not started????

check "mute"

ok thanks

Philosophy = concept is v. important in designing stage!

if you are having audio issues make sure headphones/speakers set up, check youtube or another audio source

@JoeWojcicki - it's a good exaples of how it's should not be done...

I have no audio.  Tried F5 to refresh. No help.

I remember seeing a video about a smart warehouse, where they had a "heat map" of the placement of the stored items. They were reorganized on the fly by usage, and you could see "hot" stuff wander to the outer sides.

@JoeWojcicki - no, it's not.

Hello from Fresno, CA

@danlafleur - you've got it right :)

yes, repetition is the mother of learning

Inventory control is important for production demand

Is it working?

The Course is perfecr from PHILOSOPHY point of view -for educators not for instructors - mostly

for aoudio, try F5 to refresh your page.

I suspect that repeated slides has something to do with learning and repetition.

@caa028 - consideering that the topic is about "control" those slide can repeat

Looking over my notes, I remebered that Quartus (Altera) has a very good interactive tutorail on FPGAs and how to use all of the controllers, including m-files and design consoles to build them in virtual mode, plus test equipment to view operation.

audio faint

Sequence of slides and starting "intro ones" are excellent f=for learning process.  Sound is here NRCESSARY of course

More slides on fpga than on plc/pac..

hello all

Hello

today's slidepack looks "strange" quite a few slides that we have seen before (2-7) and multiple instances of the same slide (8-13)... the only new (different) content is 14-23...

good day all

Hello all

Thanks Max, I appreciate it.

hello all

hello everyone...

hi Max and Alex

Hi Alex.

Hi!

Hi Max

HI from baltimore

hi all,

good day all

Good afternoon, Max - looking forward to an interesting presentation again today.

re raspberry: interesting device, reminds me of ZX81, including 25 years of inflation :-)

audio is loud and clear (as usual)

Good afternoon, Alex.

hELLO 

Hello everyone!

hello you guys

Good day!

Hello eveyone.

southern123 pordon za blad

hello

Good morning everyone from just north of Baltimore.

Panie Milewicz zadzwon Pan na skype souyhern123

Good afternoon.

Hello from overcast and cold, Muskegon, MI

It's fascnating to watch how normal PLCs are configured in pairs for safety applications. In a complete process automation system which has both PLCs and DCS, PLC can be programmed to stop distibuted control system applications to stop a running plant (of course in emergency situations). PLCs sure are amazing.

Good morning Max, Alex and all from Edmonton, Alberta.

Alex,

re: the Linkedin Group you mention everyday.  What's there?  What's the benefit to joining the group?

Hello from Wroclaw in the rain ;-)

Hello

Hello everyone from India

Good day to everyone from VA!

Hello from Montreal in the snow :-)

Yo

Hello from Tucson

Hello Eneryone,

Hi All

Good afternoon, standing by for more interesting information

Hello Everyone

Ladies & Gentlemen - plz share your solutions / expertise...

Good afternoon all! Looking forward to another great session!

Howdy folks!

Hello everyone.

Hello everyone.

HELLO FROM SUNNY MIAMI

Anyone heard/interested in Raspberry Pi?

Hi to everyone

Please join our Digi-Key Continuing Education Center LinkedIn Group at http://linkd.in/yoNGeY

Be sure to click 'Today's Slide Deck' under Special Educational Materials above right to download the PowerPoint for today's session.

The streaming audio player will appear on this web page when the show starts at 2pm eastern today. Note however that some companies block live audio streams. If when the show starts you don't hear any audio, try refreshing your browser.

Thanks Chris, I had a look at the pdf. It's interesting and deserves more time. This reminds me of the movie War Games where WOPR tries all possible solutions for an acceptable outcome. (the only solution was not to play).

Do a net Search for "Inside machines: PC vs PLC: Comparing control options" Very good article in the www.controleng.com website domain

If you do another such search using Yahoo or other on  article "Cover story: Balancing PLCs, PACs, IPCs " ; you should also find this within the same website domain listed above

There were some questions yesterday about Genetic Algorithms and their practical applications. They can be used to solve very complex problems, but as Max described they will find a suitable solution but it might not be the absolute best.

Here is a link to an Altera website that includes a PDF describing a high level understanding for their fitting algorithms for their FPGAs. In it they describe how they use the GA Annealing for determining a best solution for routing an FPGA.

http://www.alterawiki.com/wiki/The_Quartus_II_Fitter_and_Seed_Sweeps

It might fill in some of the gaps of how a GA is used.