When a circuit needs logic components, but too many for discrete
chips and not enough to justify a field-programmable gate array, a complex
programmable logic device (CPLD) could do the job. Altera's new MAX V kit
provides a CPLD with as many as 570 logic elements, 8 Kbytes of flash memory,
and 159 user I/O lines. Those I/O lines connect to two 40-pin male headers as
well as two connectors for small dc motors (not supplied). It has a USB
connection with a host PC supplies power, although you can connect the board to
an external power supply.
Engineers and designers who need to investigate or use CPLDs and
who can start without a stepwise tutorial might like this kit. It took longer
than expected to use an online tutorial and switch back and forth to the Altera
Quartus II design software. The online tutorial uses an FPGA as an example, so
it's not a perfect fit for CPLD designs, but it comes close. I had expected
more tutorial information created specifically to demonstrate creation of a
circuit that would run on the MAX V board.
The kit took only a few minutes to set up and connect to my lab
PC. Instead of following the brief Quick Start Guide I recommend people
download and print the† "MAX V CPLD
Development Kit User Guide," which provides information about the board,
how to check its configuration, and how to run several demonstration programs.
This 29-page document includes many hot links, but print it and the links
vanish and you get no list of URLs. I had to keep the guide open on my PC to
easily get to other reference materials. Perhaps a new version of the guide
will include URLs for these embedded links.†
A hot link in the guide points to a Development Kit installer, for
example, that downloads examples, test software, documents, PCB layouts, and
information needed to use the kit.
A second document, "MAX V Development Board Reference
Manual," includes hardware and connector-pin information. I also needed
information about how to install drivers for the USB-Blaster, basically a USB
connection with my lab PC that let me download a design to the CPLD. An
on-board JTAG controller handles the CPLD configuration and programming.
The User Guide explained how to set up Altera's Board Test System
that let me test the two LEDs and pushbuttons, monitor power use, test an
external 10-MHz clock module and so on. The oscillator drops into a socket, so
users can select an oscillator with a different frequency or use an off-board
clock signal. I had no problems with the hardware. But after running the tests you're
pretty much on your own. Altera has no tutorial that goes through a simple
step-by-step design specifically for this board. So I put together my own.
To create a logic design and test it in the CPLD you use Altera's
Quartus II software (ver 10.1), so I went to the company's site and downloaded
the 3-Gbyte free Quartus II Web Edition and installed it. I had not used
Quartus, so I signed up for a free "anytime" video course that guided
me through the steps to create a project, add circuit elements, compile a
design, assign pins, and load the design into an FPGA. The tutorial didn't
mention CPLDs and any programming differences between them and FPGAs. It became
a chore, though, to go back and forth between the video course and the Quartus
screen. In addition, the Quartus Web Edition crashed three times and each crash
meant a fresh restart with Quartus and the training. At this point I wished
Altera had provided the coursework in printed form.
Eventually I happened upon the 136-page document,
"Introduction to the Quartus II Software," but information about
online training never mentioned it. Here's the link:
http://www.altera.com/literature/manual/intro_to_quartus2.pdf. The manual
doesn't take the place of the online training, though.
After the last crash I downloaded and installed the free 30-day
trial Subscription version of Quartus, thinking it might work better, which it
did. Beware, though. This 30-day trial Subscription software will not program
devices. That's not obvious from the start.
As a final attempt to create a design I set up two computers,
downloaded the free Quartus II Web edition--again--overnight and installed it.
(Altera offers software tools on a DVD, too.) I logged into the tutorial on the
second computer and designed my simple circuit. By now I could perform several steps
at a time without having to stop the video, rewind, and start again. My project
circuit compiled, loaded into the CPLD and worked.† After creating the same circuit three of four
times I got into the routine of using Quartus. Total time for this project came
to two days, mainly because of software problems, some attributed to my errors,
along with the need to watch video-training modules several times. bet a
written tutorial would take less time to complete. For example, see the helpful
tutorial "NM201; MAX44 - Altera FPGA/CPLD Development Kit Board," at:
Instead of using the 8-bit multiplier-and-memory example in the
training, which aims at FPGA users, I followed the same tutorial steps but
created a 2-bit comparator and inserted a NAND gate in the circuit. The circuit
used the two pushbuttons as inputs and the two LEDs as outputs.
Suggested kit improvements:
Let engineers and designers know the minimum PC requirements,
such as PC speed, processor type, minimum memory, minimum disk space, etc., for
- Let people know the 30-day free trial of the Subscription
software does not provide programming capability. I hope Altera can find some
way to let people program devices during this 30-day period.
- Provide actual URLs in manuals. Hot links are fine, but why keep
a document open, not just hot links.
- Develop training aimed at CPLD users.
- Make training information available in printed form.