Inc.'sModel 71690 L-Band RF tuner and dual digitizer
module with on-board Xilinx Virtex-6 FPGA is capable of directly receiving and
digitizing signals in the 925 MHz to 2175 MHz (L-band) frequency range with a
dynamic range of -75 dBm to 0 dBm. The MAX2112 direct-conversion tuner IC
integrates variable-gain amplifiers, dual downconverting mixers and
configurable-bandwidth low-pass filters to produce baseband analog in-phase (I)
and quadrature (Q) signals for digitization.
Dual 16-bit, 200 MHz A dc synchronously
samples the I and Q signals, passing them to a Xilinx Virtex-6 FPGA for
processing tasks such as demodulation, decoding and decryption. Customers can
choose from a variety of FPGAs, including the LX130T, LX240T, LX365T, SX315T
and SX475T, to obtain the processing performance they need at the lowest cost.
Four independent memory banks provide the 71690 with a capacity of up 2 Gbyte of DDR3
SDRAM for applications requiring deep memory, or up to 32 MB of QDRII+ SRAM for
applications requiring fast random access.
The module's external interfaces
include a Gen2 PCI Express bus (x8) for native connection to the host system
for control and data transfer. In addition, the module offers application-specific
options for installation of 20 LVDS pairs for general-purpose input/output and
four gigabit interfaces to support serial protocols.
subsystem can accept an external reference signal or an optional on-board
crystal oscillator for its tuning reference. Internal timing generators provide
the module's A dc sample clock, or users can select an external reference that,
along with triggers and other control inputs, allow synchronized operation
across multiple modules.
for the on-board Virtex-6 FPGA provides customers with a combination of turnkey
and custom functionality. The board ships with the FPGA configured to provide
data acquisition, synchronization, triggering and memory control as well as a
test signal generator and control of the RF receiver tuning and bandwidth for a
complete baseband signal receiver solution. The additional space available even
in the smallest FPGA option also provides users ample opportunity to add their
own IP using Pentek's GateFlow Design Kit.
71690's native form factor is a ruggedized
XMC module compatible with the VITA 42.0 XMC specification. It can also be
implemented in PCI Express (Model 78690) and a VITA 65 3U VPX (Model 53690)
form factors. ReadyFlow software support for the Model 71690 includes drivers
for Windows and Linux platforms, as well as future support for VxWorks.
Some humanoid walking robots are also good at running, balancing, and coordinated movements in group settings. Several of our sports robots have won regional or worldwide acclaim in the RoboCup soccer World Cup, or FIRST Robotics competitions. Others include the world's first hockey-playing robot and a trash-talking Scrabble player.
The DDV-IP is a two-wheeled self-balancing robot that can deliver cold beverages to thirsty folks on hot summer days. A wireless RF remote enables manual control of the device beyond the act of self-balancing. All of the features of the DDV-IP result in an effective delivery vehicle while providing entertainment to the user.
Eric Doster of iFixit talks about the most surprising aspect of the Microsoft Surface Pro 3 teardown. In a presentation at Medical Design & Manufacturing Midwest, iFixit gave the Surface Pro 3 a score of one (out of a possible 10) for repairability.
Focus on Fundamentals consists of 45-minute on-line classes that cover a host of technologies. You learn without leaving the comfort of your desk. All classes are taught by subject-matter experts and all are archived. So if you can't attend live, attend at your convenience.