Regulations in Europe for power supplies, such as IEC 555 that require power factor correction (PFC) for units rated over 75W and IEC/EN61000-3-2 that limits harmonic current injected into the public power supply system, require greater attention to a design aspect that previously was either ignored or among the design trade-offs. In addition, improved system efficiency requirements from the U.S. Dept. of Energy’s Energy Star program and efforts such as 80 PLUS, Green Grid and more place a greater need for improving power factor. Among the industries impacted by these changes is telecommunications with its high-power equipment, but the requirements are not necessarily unique. Many semiconductor companies have simplified the design challenges for improving PFC with a variety of integrated circuits (ICs).
PFC for Improved Efficiency
By definition, the power factor of an ac system is the ratio of real power, PR, to apparent power, PA, where PR performs the useful work and PA is the sum of real power plus reactive components. Pure resistive circuits with both the voltage and current in phase have a power factor of 1. Inductive loads such as motors reduce the power factor. Power supplies with their large inductors and capacitors also decrease the power factor. Since utility companies supply customers with volt-amperes but bill for watts, a low power factor is very costly on the supply side. When the power factor is less than 1, there is greater stress on the system and the efficiency is lower.
To improve the power factor, both passive and active circuit techniques are used. Power supplies rated at 100W or less frequently use passive circuitry, essentially a low pass filter that could be a capacitor and inductors or capacitor and inductor with diodes to smooth out the signal. For high-power applications, a passive PFC can be used but that is not the norm, since the line voltage, low voltage and load have to be fixed. “Usually they are going to use a boost PFC circuit,” says Alex Craig, senior staff applications engineer, Fairchild Semiconductor.
European countries require power factor correction for power supplies rated over 75W (IEC 555) and limit the harmonic distortion a power supply can inject into the mains though IEC/EN61000-3-2. Meeting these regulations with PFC circuitry also impacts efficiency. “If you have your power factor correction in place that means you will have lower losses throughout the whole grid systems,” says Peter Di Maso, product manager for power supply controllers, Texas Instruments.
The U.S. has no similar legislation but voluntary programs to improve efficiency are providing a marketing force for reducing power supply loses. “The 80 PLUS program is recognizing and it’s rewarding any PC or desktop developer server for power supplies meeting the basic 80 PLUS or greater efficiencies for 20 percent, 50 percent or 100 percent loads and they want a true power factor of 0.9 or greater,” says Craig.
Using some of the newest more efficient technology in later dc-to-dc converter stages also dictates the use of a boost PFC. “In order to take advantage of that technology, I really need to have a stable bus that goes from, say, 340 to 400V,” says Craig. “I can’t have one that oscillates all over the place for a universal input.”
Two common design approaches to active power factor correction include discontinuous and continuous circuits.
Discontinuous and Continuous PFC Circuits
Discontinuous, also called boundary conduction, critical current or critical conduction mode (CCM), techniques are appropriate for power supplies less than 300W. “The big difference is you always turn on the MOSFET with zero current in the boost inductor, which means I never incur reverse recovery of the diode,” says Craig. At high power, the inductor can saturate limiting the discontinuous mode’s range. “CCM tends to be fixed duty cycle with variable frequency,” he says.
Continuous or average current mode PFC addresses higher power applica-tions. “In the continuous conduction mode, the current basically oscillates back and forth around a sort of an average mean along the ac line,” says Craig. “So when you are switching, you are incurring the recovery of the boost diode.” This requires a good boost diode to avoid excessive turn-on switching losses in the boost FET. However, the technique can be used for higher power since it does not result in saturating the inductor. “These tend to operate at a fixed frequency with variable duty cycles,” says Craig.
Designed for power supplies with boost power factor correction, Fairchild’s SG6980 is a single stage controller that uses a unique sensing technique. “We measure and read the voltage currents that are occurring on the ac line voltage through the bias winding that powers the chip,” says Craig.
The bias winding is a small inductor wrapped around the boost inductor normally used to power the chip. Since that voltage is coupled to the inductor, it provides precise information of when the voltage goes to zero without using current mode operation and sampling current with the associated losses. To determine the external component values for a specific application, Fairchild has Excel-based design tools and development boards for many PFC circuits.
Interleaving and Other Approaches
Interleaving is a technique that increases system efficiency by reducing conduction losses. According to TI’s Di Maso, interleaving is essentially two boost converters running in parallel but 180-degres out of phase. “When the switch of one converter turns on, the other one is off,” says Di Maso. “180-degrees later, the second switch turns on and by that time the other switch is off.”
This design cancels the input and output ripple current reducing the ripple losses and EMI generated by the power supply. It also makes each power stage much smaller by allowing the use of components rated for lower currents. This includes smaller input filter and output ripple filters, as well as a smaller boost inductor. According to Di Maso, with interleaving, the toroids may be about 30 to 40 percent smaller but could be as much as 75 percent smaller depending on the design trade-offs.
In TI’s transition mode (TM) designs, when the inductor current reaches zero, the one FET switch is turned off. “We call it transition mode because we don’t actually go discontinuous, as soon as the current reaches zero, we turn the other one back on,” says Di Maso. “Therefore, there is never a dead band of current. The current waveform is always triangular in nature.”
An example of interleaving is TI’s UCC28070 two-phase, average current-mode controller that targets multi-kilowatt communications, server and industrial systems. The interleaved, two-phase PFC controller provides all the benefits of standard power factor correction, forcing the input current to follow the input voltage, thereby reducing the current spikes and eliminating harmonics.
Renesas Technology Corp.’s R2A20112 PFC controller also uses an interleaved design. Master and slave signals control the two critical conduction mode sections with a high degree of precision. The company credits the design with a 5 percent improvement in efficiency compared to its previous products.
Interleaving is not the only advanced technique for PFC circuitry. International Rectifier has a slightly different methodology to power factor correction. IR’s µPFC family of controller ICs uses a patented one-cycle control, integrator with reset technique to deliver the performance of continuous conduction mode circuitry with the simplicity and low component count of discontinuous current mode.
Other companies, such as Infineon Technologies, address power factor correction with both continuous mode and discontinuous mode circuits.
The impact of low power factor
|Passive (frequently just a capacitor at the input) or active, integrated circuit-based, circuitry can improve the power factor. Comparing a circuit with the same efficiency (?) but with a PF of 0.95 and 0.65, a quick calculation shows the resulting increase in current. Since safety limits dictate operation at 80 percent or less of the maximum, the 0.65 PC requires increasing from a 15A (0.8 x 15A = 12A max) to 20A circuit. Analysis courtesy of Fairchild Semiconductor.