Designed for high-memory applications
This Registered ECC w/PLL, fine ball grid array-based module is a 2x128 Mx72 unit based on 512 Mb DDR SDRAM components. It has 36 128Mx4 DDR SDRAMs in fine ball grid array packages on a 184-pin DIMM (JEDEC standard). The fine ball grid array packages make for higher speed memory requirements, moving the device connections from metal leads along the side of the device to ball connections on the underside. It has clock speeds of 100, 133 and 166 MHz, Phase-lock Loop and bi-directional data strobes. It takes up about 60 percent less board space than thin small-outline package alternatives. The low-profile form factor "AD3" is 30.48 mm (1.20 inches) high. It costs $418 each in 1,000-unit volumes.
White Electronic Designs Corp.