In the world of motion control systems, we deal with delays in control loops. But far too few of us wonder if these delays are important. Short answer: A millionth of a second is not important, but a thousandth of a second is.
Many engineers have delays inside their control loops of a thousandth of a second or more without realizing it, and wonder why they cannot improve their servo performance. Time delays are one of the most significant factors that limit gains in industrial motion control systems. Delays cause the controller action to lag behind the system, introducing a destabilizing phase lag into the control loop.
These delays come from several factors:
A digital control system, because it samples feedback at discrete time
intervals, is on average, already ˝ a sampling interval behind.
Derivative delay: If the digital control system utilizes derivative gain
(velocity control using a position sensor), this adds another ˝
sampling-interval delay because of calculation of the derivative (the latest
sample minus the previous sample).
Calculation delay: Because calculations are not infinitely fast, there is a delay
between the sampling of the feedback and computation of the resulting control
Transport delay: Seldom acknowledged are "transport" delays in creating an actual physical control command signal from the computed control value.
The first two factors explain why faster sampling leads to superior performance: The inherent delays are reduced proportionally. But they also explain why you can hit the point of diminishing returns by increasing the sample rate: Once the delays are reduced to an insignificant amount, further increases do not provide a significant increase in performance.
The second factor explains why it can be harder to achieve high performance with a digital velocity loop compared to an analog loop; the inherent added delay compromises performance. Increasing the sample rate helps, but also increases the quantization "noise" (error due to digitizing a continuous quantity). Indeed, the main factor driving the new popularity of highly interpolated sinusoidal encoders is the desire to close a fast digital velocity loop, keeping delays low, without significant quantization noise.
The calculation and transport delays—at least for the controller itself—are usually less than one sampling interval (sample cycle), but can be more. The contribution of these factors can be significant, particularly in systems with low quantization noise and overall delay, permitting high gains—where a fairly small increase in calculation and transport sub-cycle delays can ruin the performance of a well-performing axis.
Amps and links. The contributions of the amplifier to total delay must also be considered, particularly if it uses digital control techniques with analog inputs. Since the amplifier's sampling is not synchronous to that of the controller, its delays must be added to the controller's in a worst-case fashion. The "smart" ±10V-input amplifiers introduced in the 1990s, while improving set-up and diagnostics, often were a big step backwards in terms of servo performance because of the time delays they added to the overall servo loop.
Open-loop Bode plots of magnitude (gain)
and phase for equivalent analog control algorithms provide phase lag value
where the gain goes to zero (magnitude=1), defining the crossover
frequency. The phase margin (difference between phase angle and 180
degrees at crossover) shows system stability due to time-delay
Serialized data links in the control loop have become popular because they can reduce the number of wires required. However, the nature of serial transmission introduces delays that must be considered in loop performance. Encoders, such as SSI (synchronous serial interface) devices, that provide serial position information, typically add a half or full sample-cycle delay. Serial links between controllers and drives, such as control rings and networks, that operate inside the feedback loop add at least two ring-cycle delays—one for feedback data (into the controller) and one for command data (out of the controller). If the ring/network is "oversampled" (reading or accessing data two or more times for each calculation), this effect can be kept to a single servo-cycle delay.
Time tool. Let's look at some examples of typical total system delays:
Traditional control system: -kHz servo update rate (500 µsec sampling delay) with
derivative-gain delay (500 µsec), and ˝-cycle computation and transport delay
into an analog torque-mode amplifier (500 µsec). Total delay = 1,500 µsec.
Typical modern control system: -kHz servo update rate (250 µsec sampling delay) with
derivative gain delay in controller (250 µsec), ˝-cycle computation and
transport delay for the controller (250 µsec), and full-cycle serial-encoder
transport delay into the controller (500 µsec); plus, using a digital
torque-mode amplifier with an asynchronous 2-kHz update rate adding a pass-off
to amplifier delay (500 µsec), an amplifier sampling delay (250 µsec), and
˝-cycle amplifier computation and transport delay (250 µsec). Total delay =
"Optimized" control system: -kHz position/velocity-loop (125 µsec sampling delay and 125 µsec derivative delay) with integrated, synchronous 12-kHz digital current-loop update, having a transport delay from the position/velocity loop to the integral amplifier (83 µsec); plus for the current loop a ˝-cycle sampling delay (42 µsec) and computation/transport delay (42 µsec). Total delay = 417 µsec.
The effect of these fixed time delays is non-linear, and therefore often not analyzed well. But there is a simple and useful method—one that is rarely used—for analyzing and understanding the effect of delays in digital controllers. For control algorithms that have reasonable analog equivalents, one can draw the open-loop Bode plots of magnitude (or gain) and phase of the system using the equivalent analog control algorithm (see graphs). On the phase-vs.-frequency plot, add the extra phase lag due to the time delay (the added lag is proportional to the frequency).
Remember that the key factor for servo stability is the phase lag at the crossover frequency, at which the magnitude is 1.0 (gain = 0), and essentially equal to the bandwidth in practical systems. This phase lag must be less than 180o for any stability. The greater the difference between the actual phase lag and 180o (phase margin), the more stable (better damped) the system. Evaluate the reduction in phase margin at the crossover frequency due to time delays, or figure the required reduction in gain required to maintain the desired phase margin.
Mitigation. What can be done to minimize the effect of delays in a system? First, carefully inventory the time delays in various possible approaches, focusing especially on the computation and transport delays. Second, get a realistic assessment of your performance requirements in terms of bandwidth. Usually the bandwidth of disturbance rejection is more important than that for tracking a desired trajectory.
If there is a potential problem (more than 10o added lag at the desired bandwidth), you must winnow down your options. Focus on faster update rates, and schemes to minimize other delays. Look for techniques that close all of the digital loops in one processor. Look very skeptically at serial links to encoders, and serial links to "slow" drives. With modern controllers, there are many options to keep these delays insignificant, but such performance does not automatically come with every controller.
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