PolyCore's Poly-Platform 2.0 includes a graphical configuration tool that maps an application to a processor's multiple cores. With the tool, developers can define memory use and control interprocessor communication graphically. The latest version offers visual feedback for engineers mapping their applications to each core. "The goal is to make the best use of the resources you have in your system," Gribb said. "You might have one processor that's using more compute time than another. The idea is to balance the load across the processors."
TI's Multicore Navigator takes a different approach by implementing the solution in hardware. It specifies data structures for communication modules, thereby facilitating direct memory access (DMA) and providing a consistent API to the host software. TI says the feature, available on the company's Keystone-based digital signal processors, minimizes complexity and makes the most efficient use of memory. "The idea is to build all of the things into hardware that assist the software in a multicore environment," Flanagan said.
Gribb said there's a big need for such solutions. He has seen users implement applications on multicore devices, only to find that one core wasn't running. He has also seen engineers try to adapt applications written in assembly language to multicore environments.
As software grows more complex and developers try to reduce power consumption, more designers will reach for multicore devices and then need help, Gribb said. "In almost every industry, consolidation is here. Eventually, engineers want to add features and move to multiple cores. When they consolidate, they have to deal with these issues."