If the design of Subaru’s XV Crosstrek Hybrid car is any indication, we may now be seeing the next new wrinkle in the evolution of automotive test simulation.
Subaru engineers provided a glimpse of that “wrinkle” when they discussed the process they used to test the motors and inverters on the Crosstrek at National Instruments' recent NIWeek 2014. By making a seemingly simple change in their hardware, they say, test time dropped by an amazing 94% -- from about 2,000 hours to just 118 hours.
In testing of the motors on Subaru’s XV Crosstrek Hybrid, engineers used FPGA-based hardware-in-the-loop simulation. (Source: National Instruments)
The key to that reduction was simple: Instead of a conventional CPU with a real-time OS, their simulation test system employed a field programmable gate array (FPGA). “Essentially, the FPGA allows engineers to create their own purpose-built computer,” Ian Fountain, a director of marketing for National Instruments Inc., tells Design News. “They take the FPGA and turn it into a computer that enables them to simulate whatever they want.”
To be sure, an FPGA doesn’t help in-road testing or lab testing. It’s specifically geared toward hardware-in-the-loop simulation, where engineers physically test hardware using a software-based math representation of the world. Moreover, the FPGA is especially helpful in the development of hybrids and electric cars, where motors and inverters call for high-performance test hardware.
Subaru engineers used FPGA-based FlexRIO to cut the Crosstrek’s test times from about 2,000 hours to 118 hours. (Source: National Instruments)
”In order to simulate the signals from an electric motor, the computation needs to be really fast,” Subaru engineer Tomohiro Morita tells Design News through an interpreter. “You need one microsecond loop rates.”
The FPGA provides those microsecond loop rates, Subaru engineers say. Unlike a conventional processor-based test system, which uses a communication bus to connect the processor to the I/O, the FPGA incorporates everything on a single die. As a result, communication between nodes is virtually instantaneous. “The FPGA is both the processing node and the I/O node,” says Ben Black, a market development manager for real-time test systems at National Instruments. “So you don’t lose any time to latency, because there is no latency.”
In contrast, processor-based systems offer loop rates no faster than about 20 µs, which would have been much too long for use in the testing of the Crosstrek’s motors, Black tells us.
Subaru engineers used a National Instruments test platform consisting of LabVIEW software and FPGA-based FlexRIO hardware to design the Crosstrek’s motors and inverters. Without the FPGA-based test system, they say, they probably wouldn’t have run hardware-in-the-loop simulation at all. Instead, they would have tested in the lab, which would have taken about 20 times longer to complete.
For engineers, the lesson is that FPGA-based analysis may be the next step in the evolution of automotive testing, which has moved from the road, to the lab, to the computer over the past 50 years. For now, FPGAs are best suited to certain components -- motors, inverters, and batteries -- that call for ultra-fast loop rates. But as hybrids and electric cars grow in popularity over the next few years, they’re likely to take on a larger role.
In Subaru’s case, simulation offered a clear set of benefits -- lower costs, faster time-to-market, and reduced reliance on road and lab tests. “Smarter products require smarter algorithms,” Fountain tells us. “For companies to bring those smart products to market, they’re going to have to find ways to wring more cost out of the validation.”
My greatest worry is missing vital information that may compromise safety. I am a mechanical engineer and must admit I probably don't understand the minute details of the testing and simulation you mention in your article. I look at GM and the problems they had and are having with ignition switches and cringe a little when the objective is strictly time to market and cost cutting relative to testing. I know from your previous articles, GM's problem did not lie with insufficient testing but unwillingness to recognize or act upon reality and make necessary changes prior to experienced difficulties. (Great articles by the way!!) I just hope the FPGAs are backed up, at least initially, with good-old-fashion test result using proven methods. This will allow confidence and continued use of the "new" methodology.
Thank you for keeping us posted Charles. Excellent article as usual.
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