An industry consortium says that manufacturers of mobile and consumer devices will benefit from future use of fully-depleted silicon-on-insulator (FD-SOI) technology, setting the stage for what could be a dramatic change in semiconductor fabrication.
The consortium, which includes such members as ARM Holdings, Globalfoundries, IBM, STMicroelectronics and others announced last week that it “has demonstrated key benefits of planar FD-SOI technology for these applications based on an ARM processor. Planar FD-SOI technology enables substantial improvements in performance and power consumption for next-generation mobile devices, delivering high-performance applications with rich multimedia and communications functionality, reduced power consumption and improved battery life.”
Known as the SOI Industry Consortium, the group released the results of its assessment of FD-SOI last week. It said that early benchmarks demonstrate the technology’s ability to reduce SRAM operating voltage to about 0.7 V (instead of the more conventional 0.85 V), thereby cutting memory power consumption up to 40 percent.
The announcements have raised hopes because the technology could enable chip makers to stay with a planar structure, instead of the three-dimensional structure that’s being contemplated as they near the 20-nm feature-size barrier.
In a Wall Street Journal story last week, however, an Intel engineer said that the technology doesn’t interest his company. “The performance on these devices is just very poor,” he told the newspaper.