Adhesives used in medical electronics can also help with thermal design. For example, Master Bond's thermally conductive systems, including epoxies, silicones, and other elastomerics, vary in cure speed, viscosity, temperature resistance, flexibility, and thermal conductivity. The company designed its EP21ANHT thermally conductive epoxy system for tightly packed components and miniaturized electronic circuits. It has a low coefficient of thermal expansion of 18-20 in/in x 10-6 per degree centigrade, a dielectric strength of more than 400V/mil, and a tensile shear strength greater than 1,000psi. It resists a wide range of chemicals and adheres to a variety of substrates.
In consumer electronics, stiffer materials that also possess high ductility, flame retardancy for thinner walls, and good resistance to chemicals are becoming popular. As the number of antennas go up, materials must also possess good EMI shielding. For these uses, SABIC offers LNP Verton and Thermocomp compounds and Lexan EXL resins. Its LNP Thermocomp NX11302 polycarbonate/ABS-based thermoplastic compound, for example, provides high-impact resistance for durability, high flexural modulus for thin walls, and dimensional stability.
Electrically conductive adhesives and pastes, such as Henkel's ABLESTIK ICP-3535M1, are designed for electrical and adhesion stability, quick low-temperature curing, and no bleeding or wicking in the tight spaces of miniaturized components.
(Source: Henkel Electronic Materials)
At a smaller scale of electronics, thinned wafers and through-silicon vias (TSVs) are chip packaging technologies enabling thinner, smaller consumer systems. Both are key technologies for stacking thinned wafers in 3D, a chip packaging method that's been mostly in R&D for several years. A 3D TSV market is just now developing for logic and memory chips, and volume production of stacked chip packages are expected to begin next year, Jim Ehle, 3M's marketing manager for electronic markets materials, said in an interview.
Existing 3D stacking methods have produced structures that are still pretty flat. 3M, which has not worked in the semiconductor area before, is partnering with IBM to jointly develop a new class of adhesives and processes that will let as many as 100 chips be stacked at the wafer level. This method will apply adhesive to hundreds of chips at a time, instead of one at a time as is currently done. The adhesives will also efficiently conduct heat through a densely packed stack of chips.
The challenges include a temporary wafer bonding system. You need thin wafers to etch TSVs, and thin wafers also improve thermal performance. The wafers need to be supported while doing backside grinding before they are diced. Our adhesive bonding process is fast and done at room temperature, because it's UV-cured. Usually before debonding, the wafer is put on a frame, and when you take it off, there's adhesive left on it, but our adhesive peels right off. That temporary bonding and debonding system has been a problem in the TSV market.