COMPANY: Avnet Design Services
LOCATION: Phoenix, AZ
ENGINEERING SERVICES PROVIDED: Avnet Design Services provides FPGA design services on a fee-for-service basis to Avnet customers. Common design services include intellectual property (IP) core integration, design conversions, MicroBlaze soft-processor peripheral creation, and timing optimization.
PROJECT DESCRIPTION: Field programmable gate arrays, (FPGAs), have grown sufficiently in capacity and functionality to support complete platforms on a single chip. It is now possible to implement processing, memory, and high-speed I/O on a single FPGA. In addition to the high capacity and additional functionality, reprogrammable FPGAs also allow designs to be easily changed even after hardware has been designed. This capability allows versatile hardware to be developed as a platform on which applications can be formulated, making it easier to hit evolving standards or changing customer requirements. The consumer market has traditionally been a fast moving one, and video and audio applications, in particular, have been a challenge.
The solution approach taken in this design is to create a flexible hardware using only an FPGA and the necessary physical layer devices required by the target application market. The FPGA will provide all the functionality required by the application. It will allow changes to be made even after the device is purchased by simply hooking it to the Internet and downloading the code required by the specific device. Note that this also means that a single hardware platform can be used for multiple styles of a product (different feature sets) or even different application classes.
ENGINEERING CHALLENGES: The target application for the video processing peripheral is interfacing between a variety of video devices and formats and allowing a computer to capture, store, and operate on the video data stream. The video peripheral will accept video input from one of four sources—the Ethernet port, the USB port, the PCI bus, or the PC card interface. The video can be captured for processing by the computer or simply transferred from input to output port as required by the user. Because of the flexible nature of the hardware platform used in the design, engineers can take advantage of new features and reconfigure their designs on demand. New bit files can be transferred via the Ethernet port, USB port, PCI bus or via the PC card interface.
COMPONENTS/TOOLS EMPLOYED: In order to speed time to market and demonstrate the viability of the target application, the design strategy was to use an off-the-shelf development board from Avnet Design Services, pre-developed intellectual property (IP) cores from Xilinx, and a high productivity FPGA design tool from Celoxica.
Each of the peripheral signal sources (USB, PCI, Ethernet, and Card Bus) has a corresponding IP core that is used to connect the physical layer interface to the internal data bus in the FPGA. These IP cores are available from Xilinx and its partners and significantly speed development processes. The control of the capture and communication process is done within the FPGA using a Xilinx MicroBlaze soft processor core. Available as an IP core from Xilinx, it provides the control of the flow of data from the various input, output, and memory devices. Code for the processor is written in C and the GNU C compiler is used to create code for MicroBlaze. This portion of the design is not speed critical—it is control oriented—so a serial approach to execution was selected.
The video algorithms require a parallel implementation so the MicroBlaze processor was not selected for implementing this part of the design. The algorithms required to translate the video signals could be written using VHDL and would meet the speed required, but that would take a considerable time—a faster method needed to be found to "pound out" these high level video algorithms. The Celoxica FPGA design tools allow the designer to write the code for the algorithm in C and compile it directly to FPGA gates. This results in a parallel hardware implementation, hits the performance required, and only takes days to develop.
An Avnet Design Services development board is used to host the application in a prototype form. It consists of a Xilinx Virtex-1000E FPGA, Micron 48LC8M16A2TG SDRAM, Philips ISP1501 USB controller, Philips SAA7114HBE Video Decoder, and AMD Am29LV017D-70EC Flash memory. For more information on this design visit the Avnet Design Services web site at www.avnetavenue.com and click on the Video Processing Peripheral Application Note.