ELECTRONICS: Crystek’s CPLL58-3900-4300 PLL/Synthesizer operates from 3,900 to 4,300 MHz with a typical step size of 2,500 KHz. Engineered and manufactured in the U.S., it is housed in a compact 0.582 x 0.8 x 0.15-inch SMD package, which saves board space. Crystek’s PLL/Synthesizer construction essentially wraps a VCO around a PLL in a package that’s only marginally larger than a VCO on its own, and significantly smaller than separate VCO/PLL modules. The CPLL58-3900-4300 needs only an external frequency reference and supply voltages for the internal PLL (phase lock loop) and VCO (voltage controlled oscillator), and is programmed using a standard three line interface (Data, Clock and Load Enable). Typical phase noise for the CPLL58-3900-4300 is -95 dBc/Hz at 10 KHz offset with minimum output power of 3 dBm. VCO voltage is 5V dc; PLL voltage is 3V dc. Second harmonic suppression is -15 dBc typical. It is ideal for use in telecommunications, computers, radio equipment, base stations and other electronic applications.
Two researchers from Cornell University have won a $100,000 grant from NASA to continue work to develop an energy-harvesting robotic eel the space agency aims to use to explore oceans on one of the moons of Jupiter.
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