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Vertical Union
Interview by Michelle M. Lang -- Design News, November 3, 2003
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| Building Up: Professor Ronald Guttmann holds a circular 200-mm diameter chip wafer. To add more functionality, he is vertically stacking, bonding, and then thinning down chip wafers. |
Ronald Gutmann is stacking chips and wagering that his effort to interconnect wafers in 3D will allow more electrical functionality in less space.
Present Position: Professor, Dept. of Electrical, Computer, and Systems Engineering, Rensselaer Polytechnic Institute
Degrees: B.E.E., Rensselaer Polytechnic Institute; M.E.E., New York University; Ph.D. in Electrophysics, RPI
Area of research: Semiconductor devices, IC technology, and microwave/RF techniques
Most recent research? Typically in ICs, you try to make individual features smaller and components larger to enable more functionality on an individual 2D chip. One option to increase productivity is to put more than one active layer in a 3D stack. So we are building in a vertical direction.
Is there a vertical limit to stacking interconnects? We envision three to four levels as being adequate for most applications. Stacking the chip wafers involves aligning the wafers, bonding them together with dielectric or insulating adhesive, thinning the wafer down to 1 to 10 mirons, and then inter-wafer interconnecting using copper damascene patterning. The new wafer is the same thickness as the original wafer.
Doesn't thinning a chip take away some functionality? No, the full functionality of the wafer is contained in the top 10 microns of a 730-nm thick wafer. The remainder of the wafer is for enabling handling during IC processing.
Is heat dissipation a problem with all those layers? Thermal flow is an issue. It is handled by placing heat generating circuits at the "bottom" and low heat generating circuits at the "upper levels." The issue is real, but can be minimized by proper partitioning—and with new thermal designs, which are not part of our research.
What are some target applications? High-performance microprocessors, 3D imaging applications, and wireless products for industrial, consumer, and aerospace and defense uses.
Contact Gutmann at gutmar@rpi.edu
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