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DAC 2000: Semiconductors echo mechanical trends
Apart from seeing the acronym SoC (system on a chip) all over the Design Automation Conference 2000, the buzzwords were: reuse, design and project management, communication, and collaboration.
By Louise Elliott, Contributing Editor -- Design News, August 21, 2000
Los Angeles —While the language and acronyms differ, the concerns of companies and designers in the electronic design automation (EDA) world in the year 2000 sound very much like those in the mechanical product world, as expressed at the CIM data conference in April, held in Palm Springs, CA.
Apart from seeing the acronym SoC (system on a chip) all over the Design Automation Conference 2000, the buzzwords were: reuse, design and project management, communication, and collaboration. Sound familiar?
Attendee James Edgerton (Portland, OR) says that he was re-entering the EDA field after a break of five years. "It looks to me as though EDA is about two years behind the curve in Web-based applications, but working hard to catch up."
Illustrating his comments, application service provider (ASP) sites drew a lot of interest on the show floor. DesignSphere Access, which launched on June 1, comes from competitors Synopsys and Avant! working together. The site offers an open hosted design environment that enables design collaboration and links directly to Taiwan Semiconductor Manufacturing Company (TSMC)'s eFoundry service. Quickturn, a Cadence company, offers another ASP arrangement that operates like a virtual private network for physical design verification. This site is accessible only to customer companies, the employees they designate, and the Quickturn personnel supporting that particular company.
Synopsys also introduced a C/C++ compiler called CoCentric SystemC that automates hardware implementation from system-level descriptions. Craig Cochran, director of corporate marketing, says, "High- level languages like Verilog and VHDL are normally used for semiconductor hardware applications. C/C++ is a software language. But in a complex design like a cell phone, 60% of the product is software. Now designs can compile C/C++ descriptions into a gate-level netlist, saving a lot of time." Synopsys displayed circuits designed with the new compiler by customers including Unisys, Silicon Graphics, and LSI Logic Corp.
Design and product management, along with the associated issue of design reuse, were hot issues at DAC. Synchronicity, dedicated to enterprise management and Internet-based design and project tracking for companies with multiple sites, joined with Sun Microsystems in hosting a luncheon symposium entitled "Get the whole project team on the same page," which played to an overflow crowd. The two also launched "Network Effect"—a partner program for optimizing critical design tasks and business transactions using web technology. Cliosoft, also offering a system for design data management, demonstrated a new version of its SOS system with integrated bug tracking. And Cadence announced the purchase of an off-shore PDM company.
Also at the show, Thomas Rudlof, who works for Siemens (Munich, Germany), notes, "The increase in capacity is very significant, as is the automatic verification at the show." As though to illustrate his point, Hewlett-Packard introduced its J6000 system, designed specifically for EDA. The J6000 ultra-slim, 16-Gbyte RAM computers can be racked to create a "computer farm." HP's Dick Lubinski says that designers need 1 Kbyte of RAM for every gate in a circuit that can have 140 million gates. The company also demonstrated e-utilica, "a pre-integrated solution that will enable ASPs to offer technical design customers instant access to applications and computational capacity," according to HP's Darlene Letey.
Intellectual property (IP) evaluation, verification, and packaging attracted a great deal of attention at DAC 2000. IP generally means chips, circuits, and SoCs licensed from third-party vendors and integrated into electronic systems. It can also refer to in-house designs being reused in new products. Faster time to market depends on being able to access IP data easily, for which Synchronicity introduced IP Gear. The product provides secure international distribution of semiconductor IP over the Internet.
Many IP vendors displayed new products at the conference. The Manta programmable distributed signal processor (DSP) chip was one standout. Zafar Malik, vice president of design services for Billions of Operations Per Second (BOPS) said, "The Manta SoC offers 24 billion operations per second on a single programmable chip, for such DSP communications applications as phones, printers, digital cameras, and digital television." The company claims three times the performance of any other DSP chip on the market.
Such performance may come in handy as the EDA industry rushes into the communications-dependent world of web-based international business.
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